broadwell: Decouple LPDDR3 DQ/DQS maps from pei_data
Introduce the `BROADWELL_LPDDR3` Kconfig option along with some wrapper code to allow mainboards using LPDDR3 DRAM to supply the DQ/DQS maps to chipset code without having to use `pei_data`. The only mainboard using LPDDR3 is Google Samus. Change-Id: I0aaf0ace243c03600430c2a7ab6389a7b20cb432 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55812 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@@ -13,6 +13,12 @@ config SOC_SPECIFIC_OPTIONS
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select MRC_SETTINGS_PROTECT
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select REG_SCRIPT
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config BROADWELL_LPDDR3
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bool
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help
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Selected by mainboards using LPDDR3 DRAM to supply mainboard-specific
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LPDDR3 DQ and DQS CPU-to-DRAM mapping info needed to perform raminit.
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config ECAM_MMCONF_BASE_ADDRESS
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default 0xf0000000
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@@ -33,9 +33,17 @@ struct spd_info {
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unsigned int spd_index;
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};
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struct lpddr3_dq_dqs_map {
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uint8_t dq[2][6][2];
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uint8_t dqs[2][8];
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};
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/* Mainboard callback to fill in the SPD addresses */
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void mb_get_spd_map(struct spd_info *spdi);
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/* Mainboard callback to retrieve the LPDDR3-specific DQ/DQS mapping */
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const struct lpddr3_dq_dqs_map *mb_get_lpddr3_dq_dqs_map(void);
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void broadwell_fill_pei_data(struct pei_data *pei_data);
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void mainboard_fill_pei_data(struct pei_data *pei_data);
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@@ -196,6 +196,13 @@ void perform_raminit(const struct chipset_power_state *const power_state)
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mainboard_fill_pei_data(&pei_data);
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if (CONFIG(BROADWELL_LPDDR3)) {
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const struct lpddr3_dq_dqs_map *lpddr3_map = mb_get_lpddr3_dq_dqs_map();
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assert(lpddr3_map);
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memcpy(pei_data.dq_map, lpddr3_map->dq, sizeof(pei_data.dq_map));
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memcpy(pei_data.dqs_map, lpddr3_map->dqs, sizeof(pei_data.dqs_map));
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}
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/* Obtain the SPD addresses from mainboard code */
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struct spd_info spdi = { 0 };
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mb_get_spd_map(&spdi);
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