cpu/amd/model_10xxx: Add support for early cbmem

mainboards/amd/fam10: Initialize cbmem area after raminit

When GFXUMA is enabled, CBMEM is placed at TOM - UMASIZE
When GFXUMA is disabled, CBMEM is placed at TOM
This matches the behaviour present before conversion to early
CBMEM.

The CBMEM location code implicitly assumes TOM does not change
between romstage and ramstage.  TOM is set by romstage raminit,
and is never changed by romstage or ramstage afterward.  As
the CBMEM location is positioned at a specific offset from TOM
that is known to both romstage and ramstage early CBMEM is safe
on Fam10h systems.

TEST: Booted ASUS KFSN4-DRE and verified both cbmem timestamp
tables from romstage and cbmem log tables from ramstage.

Change-Id: Idf9e0245fe91185696ff664b06182c26b376c196
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8489
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
This commit is contained in:
Timothy Pearson
2015-03-13 13:27:58 -05:00
committed by Kyösti Mälkki
parent e24f7d37ce
commit 86f4ca5b4b
24 changed files with 30 additions and 4 deletions

View File

@@ -22,6 +22,8 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <cbmem.h>
#include "ram_calc.h"
uint64_t get_uma_memory_size(uint64_t topmem)
@@ -41,3 +43,10 @@ uint64_t get_uma_memory_size(uint64_t topmem)
return uma_size;
}
void *cbmem_top(void)
{
uint32_t topmem = rdmsr(TOP_MEM).lo;
return (void *) topmem - get_uma_memory_size(topmem);
}