chromeec: Change the API for hostevent/wake masks to handle 64-bit
ChromeEC is getting ready to bump up the hostevents and wake masks to 64-bits. The current commands to program hostevents/wake masks will still operate on 32-bits only. A new EC host command will be added to handle 64-bit hostevents/wake masks. In order to prevent individual callers in coreboot from worrying about 32-bit/64-bit, the same API provided by google/chromeec will be updated to accept 64-bit parameters and return 64-bit values. Internally, host command handlers will take care of masking these parameters/return values to appropriate 32-bit/64-bit values. BUG=b:69329196 Change-Id: If59f3f2b1a2aa5ce95883df3e72efc4a32de1190 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Furquan Shaikh
parent
beb0468fce
commit
8788fd6395
@@ -34,7 +34,7 @@
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void log_recovery_mode_switch(void)
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{
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uint32_t *events;
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uint64_t *events;
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if (cbmem_find(CBMEM_ID_EC_HOSTEVENT))
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return;
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@@ -48,7 +48,7 @@ void log_recovery_mode_switch(void)
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static void google_chromeec_elog_add_recovery_event(void *unused)
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{
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uint32_t *events = cbmem_find(CBMEM_ID_EC_HOSTEVENT);
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uint64_t *events = cbmem_find(CBMEM_ID_EC_HOSTEVENT);
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uint8_t event_byte = EC_EVENT_KEYBOARD_RECOVERY;
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if (!events)
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@@ -111,7 +111,7 @@ void google_chromeec_post(u8 postcode)
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* Query the EC for specified mask indicating enabled events.
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* The EC maintains separate event masks for SMI, SCI and WAKE.
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*/
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static u32 google_chromeec_get_mask(u8 type)
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static uint64_t google_chromeec_get_mask(u8 type)
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{
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struct ec_params_host_event_mask req;
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struct ec_response_host_event_mask rsp;
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@@ -130,13 +130,13 @@ static u32 google_chromeec_get_mask(u8 type)
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return 0;
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}
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static int google_chromeec_set_mask(u8 type, u32 mask)
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static int google_chromeec_set_mask(uint8_t type, uint64_t mask)
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{
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struct ec_params_host_event_mask req;
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struct ec_response_host_event_mask rsp;
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struct chromeec_command cmd;
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req.mask = mask;
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req.mask = (uint32_t)mask;
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cmd.cmd_code = type;
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cmd.cmd_version = 0;
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cmd.cmd_data_in = &req;
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@@ -148,14 +148,14 @@ static int google_chromeec_set_mask(u8 type, u32 mask)
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return google_chromeec_command(&cmd);
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}
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u32 google_chromeec_get_events_b(void)
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uint64_t google_chromeec_get_events_b(void)
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{
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return google_chromeec_get_mask(EC_CMD_HOST_EVENT_GET_B);
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}
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int google_chromeec_clear_events_b(u32 mask)
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int google_chromeec_clear_events_b(uint64_t mask)
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{
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printk(BIOS_DEBUG, "Chrome EC: clear events_b mask to 0x%08x\n", mask);
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printk(BIOS_DEBUG, "Chrome EC: clear events_b mask to 0x%016llx\n", mask);
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return google_chromeec_set_mask(
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EC_CMD_HOST_EVENT_CLEAR_B, mask);
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}
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@@ -176,7 +176,7 @@ int google_chromeec_get_mkbp_event(struct ec_response_get_next_event *event)
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}
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/* Get the current device event mask */
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uint32_t google_chromeec_get_device_enabled_events(void)
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uint64_t google_chromeec_get_device_enabled_events(void)
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{
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struct ec_params_device_event req;
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struct ec_response_device_event rsp;
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@@ -197,13 +197,13 @@ uint32_t google_chromeec_get_device_enabled_events(void)
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}
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/* Set the current device event mask */
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int google_chromeec_set_device_enabled_events(uint32_t mask)
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int google_chromeec_set_device_enabled_events(uint64_t mask)
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{
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struct ec_params_device_event req;
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struct ec_response_device_event rsp;
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struct chromeec_command cmd;
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req.event_mask = mask;
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req.event_mask = (uint32_t)mask;
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req.param = EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS;
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cmd.cmd_code = EC_CMD_DEVICE_EVENT;
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cmd.cmd_version = 0;
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@@ -217,7 +217,7 @@ int google_chromeec_set_device_enabled_events(uint32_t mask)
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}
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/* Read and clear pending device events */
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uint32_t google_chromeec_get_device_current_events(void)
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uint64_t google_chromeec_get_device_current_events(void)
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{
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struct ec_params_device_event req;
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struct ec_response_device_event rsp;
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@@ -237,9 +237,9 @@ uint32_t google_chromeec_get_device_current_events(void)
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return 0;
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}
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static void google_chromeec_log_device_events(uint32_t mask)
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static void google_chromeec_log_device_events(uint64_t mask)
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{
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uint32_t events;
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uint64_t events;
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int i;
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if (!IS_ENABLED(CONFIG_ELOG) || !mask)
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@@ -249,7 +249,7 @@ static void google_chromeec_log_device_events(uint32_t mask)
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return;
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events = google_chromeec_get_device_current_events() & mask;
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printk(BIOS_INFO, "EC Device Events: 0x%08x\n", events);
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printk(BIOS_INFO, "EC Device Events: 0x%016llx\n", events);
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for (i = 0; i < sizeof(events) * 8; i++) {
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if (EC_DEVICE_EVENT_MASK(i) & events)
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@@ -257,10 +257,10 @@ static void google_chromeec_log_device_events(uint32_t mask)
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}
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}
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void google_chromeec_log_events(u32 mask)
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void google_chromeec_log_events(uint64_t mask)
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{
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u8 event;
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u32 wake_mask;
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uint64_t wake_mask;
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bool restore_wake_mask = false;
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if (!IS_ENABLED(CONFIG_ELOG))
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@@ -563,28 +563,28 @@ int google_chromeec_i2c_xfer(uint8_t chip, uint8_t addr, int alen,
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return 0;
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}
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int google_chromeec_set_sci_mask(u32 mask)
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int google_chromeec_set_sci_mask(uint64_t mask)
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{
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printk(BIOS_DEBUG, "Chrome EC: Set SCI mask to 0x%08x\n", mask);
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printk(BIOS_DEBUG, "Chrome EC: Set SCI mask to 0x%016llx\n", mask);
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return google_chromeec_set_mask(
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EC_CMD_HOST_EVENT_SET_SCI_MASK, mask);
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}
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int google_chromeec_set_smi_mask(u32 mask)
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int google_chromeec_set_smi_mask(uint64_t mask)
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{
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printk(BIOS_DEBUG, "Chrome EC: Set SMI mask to 0x%08x\n", mask);
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printk(BIOS_DEBUG, "Chrome EC: Set SMI mask to 0x%016llx\n", mask);
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return google_chromeec_set_mask(
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EC_CMD_HOST_EVENT_SET_SMI_MASK, mask);
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}
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int google_chromeec_set_wake_mask(u32 mask)
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int google_chromeec_set_wake_mask(uint64_t mask)
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{
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printk(BIOS_DEBUG, "Chrome EC: Set WAKE mask to 0x%08x\n", mask);
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printk(BIOS_DEBUG, "Chrome EC: Set WAKE mask to 0x%016llx\n", mask);
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return google_chromeec_set_mask(
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EC_CMD_HOST_EVENT_SET_WAKE_MASK, mask);
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}
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u32 google_chromeec_get_wake_mask(void)
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uint64_t google_chromeec_get_wake_mask(void)
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{
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return google_chromeec_get_mask(
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EC_CMD_HOST_EVENT_GET_WAKE_MASK);
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