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oryp6: set subsystem IDs

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Change-Id: I659ae6da3c5ff61c22a10ed112b82984cb3168d7
This commit is contained in:
Jeremy Soller 2020-06-26 12:26:27 -06:00 committed by Jeremy Soller
parent 264f4cd55b
commit 87a74eb767
2 changed files with 19 additions and 11 deletions
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17
src/mainboard/system76/oryp6/acpi/dgpu.asl
View File

@ -29,6 +29,7 @@
Device (\_SB.PCI0.PEGP.DEV0) Device (\_SB.PCI0.PEGP.DEV0)
{ {
Name(_ADR, 0x00000000) Name(_ADR, 0x00000000)
Name (_STA, 0xF)
Name (LTRE, 0) Name (LTRE, 0)
// Memory mapped PCI express registers // Memory mapped PCI express registers
@ -84,8 +85,6 @@ Device (\_SB.PCI0.PEGP.DEV0)
LREV, 1 LREV, 1
} }
Name (_STA, 0xF)
Method (_ON) Method (_ON)
{ {
Debug = "PEGP.DEV0._ON" Debug = "PEGP.DEV0._ON"
@ -93,10 +92,10 @@ Device (\_SB.PCI0.PEGP.DEV0)
If (_STA != 0xF) { If (_STA != 0xF) {
Debug = " If DGPU_PWR_EN low" Debug = " If DGPU_PWR_EN low"
If (! GTXS (DGPU_PWR_EN)) { If (! GTXS (DGPU_PWR_EN)) {
Debug = " DGPU_PWR_EN high" Debug = " DGPU_PWR_EN high"
STXS (DGPU_PWR_EN) STXS (DGPU_PWR_EN)
Debug = " Sleep 16" Debug = " Sleep 16"
Sleep (16) Sleep (16)
} }
@ -116,7 +115,7 @@ Device (\_SB.PCI0.PEGP.DEV0)
Local0 = 0 Local0 = 0
While (Q0L0) { While (Q0L0) {
If ((Local0 > 4)) { If ((Local0 > 4)) {
Debug = " While Q0L0 timeout" Debug = " While Q0L0 timeout"
Break Break
} }
@ -139,8 +138,6 @@ Device (\_SB.PCI0.PEGP.DEV0)
Debug = " CMDR |= 7" Debug = " CMDR |= 7"
CMDR |= 7 CMDR |= 7
//TODO: restore subsystem ID
Debug = " _STA = 0xF" Debug = " _STA = 0xF"
_STA = 0xF _STA = 0xF
} }
@ -164,7 +161,7 @@ Device (\_SB.PCI0.PEGP.DEV0)
Local0 = Zero Local0 = Zero
While (Q0L2) { While (Q0L2) {
If ((Local0 > 4)) { If ((Local0 > 4)) {
Debug = " While Q0L2 timeout" Debug = " While Q0L2 timeout"
Break Break
} }
@ -188,9 +185,9 @@ Device (\_SB.PCI0.PEGP.DEV0)
Local0 = Zero Local0 = Zero
While (! GRXS(DGPU_GC6)) { While (! GRXS(DGPU_GC6)) {
If ((Local0 > 4)) { If ((Local0 > 4)) {
Debug = " While DGPU_GC6 low timeout" Debug = " While DGPU_GC6 low timeout"
Debug = " DGPU_PWR_EN low" Debug = " DGPU_PWR_EN low"
CTXS (DGPU_PWR_EN) CTXS (DGPU_PWR_EN)
Break Break
} }

13
src/mainboard/system76/oryp6/ramstage.c
View File

@ -38,10 +38,21 @@ static void dgpu_read_resources(struct device *dev) {
} }
} }
static void dgpu_enable_resources(struct device *dev) {
printk(BIOS_INFO, "system76: dgpu_enable_resources %s\n", dev_path(dev));
dev->subsystem_vendor = CONFIG_SUBSYSTEM_VENDOR_ID;
dev->subsystem_device = CONFIG_SUBSYSTEM_DEVICE_ID;
printk(BIOS_INFO, " subsystem <- %04x/%04x\n", dev->subsystem_vendor, dev->subsystem_device);
pci_write_config32(dev, 0x40, ((dev->subsystem_device & 0xffff) << 16) | (dev->subsystem_vendor & 0xffff));
pci_dev_enable_resources(dev);
}
static struct device_operations dgpu_pci_ops_dev = { static struct device_operations dgpu_pci_ops_dev = {
.read_resources = dgpu_read_resources, .read_resources = dgpu_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources, .enable_resources = dgpu_enable_resources,
#if CONFIG(HAVE_ACPI_TABLES) #if CONFIG(HAVE_ACPI_TABLES)
.write_acpi_tables = pci_rom_write_acpi_tables, .write_acpi_tables = pci_rom_write_acpi_tables,
.acpi_fill_ssdt = pci_rom_ssdt, .acpi_fill_ssdt = pci_rom_ssdt,