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soc/intel: Remove INTEL_CAR_NEM_ENHANCED_V2 config option

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SF Mask MSRs' Programming which was done under this config
selection will be moved under a new config option called
CAR_HAS_SF_MASKS. This segregates the eNEM programming
sequence based on sub features supported in each processor.

Bug=b:171601324
BRANCH=volteer
Test=Build volteer build and boot on Delbin EVT.

Change-Id: If4d8d1ec52b7b79965fe1a957c48f571ec56dc63
Signed-off-by: Shreesh Chhabbi <shreesh.chhabbi@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Shreesh Chhabbi
2020-12-03 14:07:15 -08:00
committed by Furquan Shaikh
parent 5f73432737
commit 87c7ec7c06
8 changed files with 9 additions and 31 deletions
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2
src/soc/intel/tigerlake/Kconfig
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@@ -24,7 +24,7 @@ config CPU_SPECIFIC_OPTIONS
select INTEL_DESCRIPTOR_MODE_CAPABLE
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
select USE_CAR_NEM_ENHANCED_V1 if !INTEL_CAR_NEM
select INTEL_CAR_NEM_ENHANCED if !INTEL_CAR_NEM
select COS_MAPPED_TO_MSB if INTEL_CAR_NEM_ENHANCED
select INTEL_GMA_ACPI
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP