adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot"
in a number of places. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3466 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -23,9 +23,9 @@ static void copy_and_run(void)
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uint8_t *src, *dst;
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uint8_t *src, *dst;
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unsigned long ilen, olen;
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unsigned long ilen, olen;
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print_debug("Copying coreboot to RAM.\r\n");
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#if !CONFIG_COMPRESS
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#if !CONFIG_COMPRESS
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print_debug("Copying coreboot to RAM.\r\n");
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__asm__ volatile (
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__asm__ volatile (
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"leal _liseg, %0\n\t"
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"leal _liseg, %0\n\t"
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"leal _iseg, %1\n\t"
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"leal _iseg, %1\n\t"
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@ -35,6 +35,7 @@ static void copy_and_run(void)
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);
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);
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memcpy(dst, src, olen);
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memcpy(dst, src, olen);
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#else
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#else
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print_debug("Uncompressing coreboot to RAM.\r\n");
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__asm__ volatile (
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__asm__ volatile (
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"leal _liseg, %0\n\t"
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"leal _liseg, %0\n\t"
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@ -48,12 +49,12 @@ static void copy_and_run(void)
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// dump_mem(src, src+0x100);
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// dump_mem(src, src+0x100);
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olen = unrv2b(src, dst, &ilen);
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olen = unrv2b(src, dst, &ilen);
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print_debug_cp_run("linxbios_ram.nrv2b length = ", ilen);
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print_debug_cp_run("coreboot_ram.nrv2b length = ", ilen);
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#endif
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#endif
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// dump_mem(dst, dst+0x100);
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// dump_mem(dst, dst+0x100);
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print_debug_cp_run("linxbios_ram.bin length = ", olen);
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print_debug_cp_run("coreboot_ram.bin length = ", olen);
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print_debug("Jumping to coreboot.\r\n");
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print_debug("Jumping to coreboot.\r\n");
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@ -98,12 +99,12 @@ static void copy_and_run_ap_code_in_car(unsigned ret_addr)
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// dump_mem(src, src+0x100);
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// dump_mem(src, src+0x100);
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olen = unrv2b(src, dst, &ilen);
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olen = unrv2b(src, dst, &ilen);
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// print_debug_cp_run("linxbios_apc.nrv2b length = ", ilen);
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// print_debug_cp_run("coreboot_apc.nrv2b length = ", ilen);
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#endif
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#endif
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// dump_mem(dst, dst+0x100);
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// dump_mem(dst, dst+0x100);
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// print_debug_cp_run("linxbios_apc.bin length = ", olen);
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// print_debug_cp_run("coreboot_apc.bin length = ", olen);
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// print_debug("Jumping to coreboot AP code in CAR.\r\n");
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// print_debug("Jumping to coreboot AP code in CAR.\r\n");
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@ -52,9 +52,9 @@ static void copy_and_run(unsigned cpu_reset)
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#endif
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#endif
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// dump_mem(dst, dst+0x100);
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// dump_mem(dst, dst+0x100);
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#if CONFIG_USE_INIT
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#if CONFIG_USE_INIT
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printk_spew("linxbios_ram.bin length = %08x\r\n", olen);
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printk_spew("coreboot_ram.bin length = %08x\r\n", olen);
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#else
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#else
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print_spew("linxbios_ram.bin length = "); print_spew_hex32(olen); print_spew("\r\n");
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print_spew("coreboot_ram.bin length = "); print_spew_hex32(olen); print_spew("\r\n");
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#endif
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#endif
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print_debug("Jumping to coreboot.\r\n");
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print_debug("Jumping to coreboot.\r\n");
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@ -92,7 +92,7 @@ unsigned node_link_to_bus(unsigned node, unsigned link)
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* pci1234[0] will record the south bridge link and bus range
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* pci1234[0] will record the south bridge link and bus range
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* pci1234[i] will record HT chain i.
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* pci1234[i] will record HT chain i.
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*
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*
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* For example, on the Tyan S2885 linxbios_ram will put the AMD8151 chain (HT
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* For example, on the Tyan S2885 coreboot_ram will put the AMD8151 chain (HT
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* link 0) into the register 0xE0, and the AMD8131/8111 HT chain into the
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* link 0) into the register 0xE0, and the AMD8131/8111 HT chain into the
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* register 0xE4.
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* register 0xE4.
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*
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*
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