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nb/intel/sandybridge: replace NORTHBRIDGE with HOST_BRIDGE define

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The two defines are identical, so deduplicate this.

Timeless build for lenovo/x230 results in identical binary.

Change-Id: I32e0eee88d72eb6f8dc71b0324d62f46079120a9
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38579
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Felix Held
2020-01-26 04:55:27 +01:00
committed by Patrick Georgi
parent 3f3b4d5d74
commit 87ddea26cf
2 changed files with 4 additions and 4 deletions
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3
src/northbridge/intel/sandybridge/raminit_common.c
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@ -497,7 +497,6 @@ void dram_zones(ramctr_timing *ctrl, int training)
}
}
#define HOST_BRIDGE PCI_DEV(0, 0, 0)
#define DEFAULT_TCK TCK_800MHZ
unsigned int get_mem_min_tck(void)
@ -595,7 +594,7 @@ void dram_memorymap(ramctr_timing *ctrl, int me_uma_size)
mmiosize = get_mmio_size();
ggc = pci_read_config16(NORTHBRIDGE, GGC);
ggc = pci_read_config16(HOST_BRIDGE, GGC);
if (!(ggc & 2)) {
gfxstolen = ((ggc >> 3) & 0x1f) * 32;
gttsize = ((ggc >> 8) & 0x3);

3
src/northbridge/intel/sandybridge/raminit_common.h
View File

@ -136,8 +136,9 @@ typedef struct ramctr_timing_st {
dimm_info info;
} ramctr_timing;
#define HOST_BRIDGE PCI_DEV(0, 0, 0)
#define SOUTHBRIDGE PCI_DEV(0, 0x1f, 0)
#define NORTHBRIDGE PCI_DEV(0, 0x0, 0)
#define FOR_ALL_LANES for (lane = 0; lane < NUM_LANES; lane++)
#define FOR_ALL_CHANNELS for (channel = 0; channel < NUM_CHANNELS; channel++)
#define FOR_ALL_POPULATED_RANKS for (slotrank = 0; slotrank < NUM_SLOTRANKS; slotrank++) if (ctrl->rankmap[channel] & (1 << slotrank))