soc/intel/quark: Enable Serial Port

Add the code to enable debug serial output using HSUART1:

*  Enable the code using Kconfig value ENABLE_BUILTIN_HSUART1
*  Note that the BIST value is always zero as validated in
   esram_init.inc
*  The initial TSC value is currently not saved!

Testing on Galileo:
*  Edit the src/mainboard/intel/galileo/Makefile.inc file
   *  Add "select ADD_FSP_PDAT_FILE"
   *  Add "select ADD_FSP_RAW_BIN"
   *  Add "select ADD_RMU_FILE"
*  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
*  Place the pdat.bin files in the location specified by
   CONFIG_FSP_PDAT_FILE
*  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
*  Testing is successful if serial output is present on HSUART1 at
   115200 baud, 8-bit, no parity

Change-Id: I7e6181e8b9bc901c3ab236f0b56534850bb6bfd0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13445
Tested-by: build bot (Jenkins)
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>

src/soc/intel/quark/tsc_freq.c

@@ -0,0 +1,36 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2015-2016 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/tsc.h>
+
+static unsigned long bus_freq_khz(void)
+{
+	/* cpu freq = 400 MHz */
+	return 400 * 1000;
+}
+
+unsigned long tsc_freq_mhz(void)
+{
+	/* assume ratio=1 */
+	unsigned bclk_khz = bus_freq_khz();
+
+	if (!bclk_khz)
+		return 0;
+
+	return (bclk_khz * 1) / 1000;
+}