From 88dd4f705aac9f5b3bf21c8d7a4e516167ac32c5 Mon Sep 17 00:00:00 2001
From: Anil Kumar <anil.kumar.k@intel.corp-partner.google.com>
Date: Thu, 22 Apr 2021 11:35:36 -0700
Subject: [PATCH] mb/intel/adlrvp: Enable support for Chrome OS mode switches

Branch=none
Test=build and boot ADL-M RVP. Test recovery mode using servo command
dut-control power_state:rec

Signed-off-by: Anil Kumar <anil.kumar.k@intel.com>
Change-Id: I771f0ef14b1c273f9d1af22c96de0eabd08e9a8c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52614
Reviewed-by: Selma Bensaid <selma.bensaid@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/intel/adlrvp/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 8a64e49735..ce5665c567 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -80,6 +80,7 @@ config ADL_CHROME_EC
 	select EC_GOOGLE_CHROMEEC_ESPI
 	select EC_GOOGLE_CHROMEEC_BOARDID
 	select EC_ACPI
+	select EC_GOOGLE_CHROMEEC_LPC
 
 config ADL_INTEL_EC
 	bool "Intel EC"
@@ -90,6 +91,7 @@ endchoice
 config VBOOT
 	select VBOOT_LID_SWITCH
 	select VBOOT_MOCK_SECDATA
+	select EC_GOOGLE_CHROMEEC_SWITCHES if ADL_CHROME_EC
 
 config UART_FOR_CONSOLE
 	int