some progress on kconfig:

- northbridges are done
- southbridges are done
- Intel CPUs are done, with a design that the board only has to specify
  the socket it has, and the CPUs are pulled in automatically. There is
  some more cleanup possible in that area, but I'll do that later
- a couple more mainboards compile:
  - intel/eagleheights
  - intel/jarrell
  - intel/mtarvon
  - intel/truxton
  - intel/xe7501devkit
  - sunw/ultra40
  - supermicro/h8dme
  - tyan/s2850
  - tyan/s2875
  - via/epia
  - via/epia-cn
  - via/epia-m
  - via/epia-m700
  - via/epia-n
  - via/pc2500e
(PPC not considered, probably overlooked something)

All of them only _build_, but some options are probably completely
wrong. To be fixed later

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/Kconfig

@@ -17,6 +17,10 @@ config DCACHE_RAM_SIZE
 	hex
 	default 0x8000 if CPU_INTEL_CORE
 
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+	hex
+	default 0
+
 config SMP
 	bool
 	default y if MAX_CPUS != 1

src/cpu/intel/Kconfig

@@ -1,5 +1,15 @@
+source src/cpu/intel/model_69x/Kconfig
+source src/cpu/intel/model_6dx/Kconfig
 source src/cpu/intel/model_6ex/Kconfig
 source src/cpu/intel/model_6fx/Kconfig
-source src/cpu/intel/socket_mFCPGA478/Kconfig
-source src/cpu/intel/socket_PGA370/Kconfig
+source src/cpu/intel/model_1067x/Kconfig
+
+source src/cpu/intel/bga956/Kconfig
+source src/cpu/intel/ep80579/Kconfig
 source src/cpu/intel/slot_2/Kconfig
+source src/cpu/intel/socket_mFCPGA478/Kconfig
+source src/cpu/intel/socket_mPGA478/Kconfig
+source src/cpu/intel/socket_mPGA479M/Kconfig
+#source src/cpu/intel/socket_mPGA603/Kconfig
+source src/cpu/intel/socket_mPGA604/Kconfig
+source src/cpu/intel/socket_PGA370/Kconfig

src/cpu/intel/Makefile.inc

@@ -3,13 +3,15 @@
 #
 # Therefore: ONLY include Makefile.inc from socket directories!
 
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += bga956
+subdirs-$(CONFIG_CPU_INTEL_EP80579) += ep80579
 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478) += socket_mPGA478
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA479M) += socket_mPGA479M
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA603) += socket_mPGA603
+subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604
 subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370
 subdirs-$(CONFIG_CPU_INTEL_SLOT_2) += slot_2
 
-#socket_mPGA478
-#socket_mPGA479M
-#socket_mPGA603
-#socket_mPGA604
 #socket_mPGA604_533Mhz
 #socket_mPGA604_800Mhz

src/cpu/intel/bga956/Kconfig

@@ -0,0 +1,4 @@
+config CPU_INTEL_SOCKET_BGA956
+	bool
+	default n
+	select CPU_INTEL_CORE2

src/cpu/intel/bga956/Makefile.inc

@@ -0,0 +1,13 @@
+obj-y += bga956.o
+subdirs-y += ../model_1067x
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+

src/cpu/intel/ep80579/Kconfig

@@ -0,0 +1,3 @@
+config CPU_INTEL_EP80579
+	bool
+	default false

src/cpu/intel/ep80579/Makefile.inc

@@ -0,0 +1,12 @@
+obj-y += ep80579.o
+driver-y += ep80579_init.o
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+

src/cpu/intel/model_1067x/Kconfig

@@ -0,0 +1,5 @@
+config CPU_INTEL_CORE2
+	bool
+	default y
+	select SMP
+	select HAVE_MOVNTI

src/cpu/intel/model_1067x/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_1067x_init.o

src/cpu/intel/model_69x/Kconfig

@@ -0,0 +1,4 @@
+config CPU_INTEL_MODEL_69X
+	bool
+	default n
+	select SMP

src/cpu/intel/model_6dx/Kconfig

@@ -0,0 +1,4 @@
+config CPU_INTEL_MODEL_6DX
+	bool
+	default n
+	select SMP

src/cpu/intel/model_6xx/Kconfig

@@ -0,0 +1,4 @@
+config CPU_INTEL_MODEL_6XX
+	bool
+	default n
+	select SMP

src/cpu/intel/model_6xx/Makefile.inc

@@ -1,22 +1 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ron Minnich <rminnich@gmail.com>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
-##
-
 driver-y += model_6xx_init.o
-

src/cpu/intel/model_f0x/Kconfig

@@ -0,0 +1,5 @@
+config CPU_INTEL_MODEL_F0X
+	bool
+	default n
+	select SMP
+	select HAVE_MOVNTI

src/cpu/intel/model_f0x/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_f0x_init.o

src/cpu/intel/model_f1x/Kconfig

@@ -0,0 +1,5 @@
+config CPU_INTEL_MODEL_F1X
+	bool
+	default n
+	select SMP
+	select HAVE_MOVNTI

src/cpu/intel/model_f1x/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_f1x_init.o

src/cpu/intel/model_f2x/Kconfig

@@ -0,0 +1,5 @@
+config CPU_INTEL_MODEL_F2X
+	bool
+	default n
+	select SMP
+	select HAVE_MOVNTI

src/cpu/intel/model_f2x/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_f2x_init.o

src/cpu/intel/model_f3x/Kconfig

@@ -0,0 +1,5 @@
+config CPU_INTEL_MODEL_F3X
+	bool
+	default n
+	select SMP
+	select HAVE_MOVNTI

src/cpu/intel/model_f3x/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_f3x_init.o

src/cpu/intel/model_f4x/Kconfig

@@ -0,0 +1,5 @@
+config CPU_INTEL_MODEL_F4X
+	bool
+	default n
+	select SMP
+	select HAVE_MOVNTI

src/cpu/intel/model_f4x/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_f4x_init.o

src/cpu/intel/socket_mPGA478/Kconfig

@@ -0,0 +1,5 @@
+config CPU_INTEL_SOCKET_MPGA478
+	bool
+	default false
+	select CPU_INTEL_MODEL_69X
+	select CPU_INTEL_MODEL_6DX

src/cpu/intel/socket_mPGA478/Makefile.inc

@@ -0,0 +1,14 @@
+obj-y += socket_mPGA478.o
+subdirs-y += ../model_69x
+subdirs-y += ../model_6dx
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+

src/cpu/intel/socket_mPGA479M/Kconfig

@@ -0,0 +1,5 @@
+config CPU_INTEL_SOCKET_MPGA479M
+	bool
+	default false
+	select CPU_INTEL_MODEL_69X
+	select CPU_INTEL_MODEL_6DX

src/cpu/intel/socket_mPGA479M/Makefile.inc

@@ -0,0 +1,14 @@
+obj-y += socket_mPGA479M.o
+subdirs-y += ../model_69x
+subdirs-y += ../model_6dx
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+

src/cpu/intel/socket_mPGA603/Kconfig

@@ -0,0 +1,6 @@
+config CPU_INTEL_SOCKET_MPGA603
+	bool
+	default false
+	select CPU_INTEL_MODEL_F0X
+	select CPU_INTEL_MODEL_F1X
+	select CPU_INTEL_MODEL_F2X

src/cpu/intel/socket_mPGA603/Makefile.inc

@@ -0,0 +1,15 @@
+obj-y += socket_mPGA603_400Mhz.o
+subdirs-y += ../model_f0x
+subdirs-y += ../model_f1x
+subdirs-y += ../model_f2x
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+

src/cpu/intel/socket_mPGA604/Kconfig

@@ -0,0 +1,6 @@
+config CPU_INTEL_SOCKET_MPGA604
+	bool
+	default false
+	select CPU_INTEL_MODEL_F2X
+	select CPU_INTEL_MODEL_F3X
+	select CPU_INTEL_MODEL_F4X

src/cpu/intel/socket_mPGA604/Makefile.inc

@@ -0,0 +1,15 @@
+obj-y += socket_mPGA604.o
+subdirs-y += ../model_f2x
+subdirs-y += ../model_f3x
+subdirs-y += ../model_f4x
+subdirs-y += ../../x86/tsc
+subdirs-y += ../../x86/mtrr
+subdirs-y += ../../x86/fpu
+subdirs-y += ../../x86/mmx
+subdirs-y += ../../x86/sse
+subdirs-y += ../../x86/lapic
+subdirs-y += ../../x86/cache
+subdirs-y += ../../x86/smm
+subdirs-y += ../microcode
+subdirs-y += ../hyperthreading
+

src/cpu/x86/Kconfig

@@ -2,6 +2,10 @@ config SERIAL_CPU_INIT
 	bool
 	default y
 
+config WAIT_BEFORE_CPUS_INIT
+	bool
+	default n
+
 config UDELAY_TSC
 	bool
 	default n