some progress on kconfig:

- northbridges are done
- southbridges are done
- Intel CPUs are done, with a design that the board only has to specify
  the socket it has, and the CPUs are pulled in automatically. There is
  some more cleanup possible in that area, but I'll do that later
- a couple more mainboards compile:
  - intel/eagleheights
  - intel/jarrell
  - intel/mtarvon
  - intel/truxton
  - intel/xe7501devkit
  - sunw/ultra40
  - supermicro/h8dme
  - tyan/s2850
  - tyan/s2875
  - via/epia
  - via/epia-cn
  - via/epia-m
  - via/epia-m700
  - via/epia-n
  - via/pc2500e
(PPC not considered, probably overlooked something)

All of them only _build_, but some options are probably completely
wrong. To be fixed later

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/intel/xe7501devkit/Kconfig

@@ -0,0 +1,47 @@
+config BOARD_INTEL_XE7501DEVKIT
+	bool "xe7501 DevKit"
+	select ARCH_X86
+	select CPU_INTEL_SOCKET_MPGA604
+	select NORTHBRIDGE_INTEL_E7501
+	select SOUTHBRIDGE_INTEL_I82870
+	select SOUTHBRIDGE_INTEL_I82801CA
+	select SUPERIO_SMSC_LPC47B272
+	select HAVE_PIRQ_TABLE
+	select UDELAY_TSC
+	help
+          Intel xe7501 devkit mainboard.
+
+config MAINBOARD_DIR
+	string
+	default intel/xe7501devkit
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config LB_CKS_RANGE_START
+	int
+	default 128
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config LB_CKS_RANGE_END
+	int
+	default 130
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config LB_CKS_LOC
+	int
+	default 131
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "EIDXE7501DEVKIT"
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config HAVE_OPTION_TABLE
+	bool
+	default y
+	depends on BOARD_INTEL_XE7501DEVKIT
+
+config IRQ_SLOT_COUNT
+	int
+	default 12
+	depends on BOARD_INTEL_XE7501DEVKIT