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soc/intel: Use config_of()

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Change-Id: I0727a6b327410197cf32f598d1312737744386b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
This commit is contained in:
Kyösti Mälkki
2019-07-13 22:16:25 +03:00
parent 4af4e7f06e
commit 8950cfb66f
64 changed files with 97 additions and 167 deletions
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4
src/soc/intel/baytrail/ehci.c
View File

@@ -88,7 +88,7 @@ static const struct reg_script ehci_hc_reset[] = {
static void usb2_phy_init(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
u32 usb2_comp_bg = (config->usb2_comp_bg == 0 ?
0x4700 : config->usb2_comp_bg);
struct reg_script usb2_phy_script[] = {
@@ -123,7 +123,7 @@ static void usb2_phy_init(struct device *dev)
static void ehci_init(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
struct reg_script ehci_hc_init[] = {
/* Controller init */
REG_SCRIPT_NEXT(ehci_init_script),

2
src/soc/intel/baytrail/emmc.c
View File

@@ -46,7 +46,7 @@ static const struct reg_script emmc_ops[] = {
static void emmc_init(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
printk(BIOS_DEBUG, "eMMC init\n");
reg_script_run_on_dev(dev, emmc_ops);

2
src/soc/intel/baytrail/gfx.c
View File

@@ -313,7 +313,7 @@ static void set_backlight_pwm(struct device *dev, uint32_t bklt_reg, int req_hz)
static void gfx_panel_setup(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
struct reg_script gfx_pipea_init[] = {
/* CONTROL */
REG_RES_WRITE32(PCI_BASE_ADDRESS_0, PIPEA_REG(PP_CONTROL),

4
src/soc/intel/baytrail/lpe.c
View File

@@ -91,7 +91,7 @@ static void setup_codec_clock(struct device *dev)
struct soc_intel_baytrail_config *config;
const char *freq_str;
config = dev->chip_info;
config = config_of(dev);
switch (config->lpe_codec_clk_freq) {
case 19:
freq_str = "19.2";
@@ -150,7 +150,7 @@ static void lpe_stash_firmware_info(struct device *dev)
static void lpe_init(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
lpe_stash_firmware_info(dev);

2
src/soc/intel/baytrail/lpss.c
View File

@@ -148,7 +148,7 @@ static void i2c_disable_resets(struct device *dev)
static void lpss_init(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
int iosf_reg, nvs_index;
dev_ctl_reg(dev, &iosf_reg, &nvs_index);

8
src/soc/intel/baytrail/pcie.c
View File

@@ -108,11 +108,11 @@ static void byt_pcie_init(struct device *dev)
reg_script_run_on_dev(dev, init_script);
if (is_first_port(dev)) {
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
uint32_t reg = pci_read_config32(dev, RPPGEN);
reg |= SRDLCGEN | SRDBCGEN;
if (config && config->clkreq_enable)
if (config->clkreq_enable)
reg |= LCLKREQEN | BBCLKREQEN;
pci_write_config32(dev, RPPGEN, reg);
@@ -208,13 +208,13 @@ static void check_device_present(struct device *dev)
static void byt_pcie_enable(struct device *dev)
{
if (is_first_port(dev)) {
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
uint32_t reg = pci_read_config32(dev, PHYCTL2_IOSFBCTL);
pll_en_off = !!(reg & PLL_OFF_EN);
strpfusecfg = pci_read_config32(dev, STRPFUSECFG);
if (config && config->pcie_wake_enable)
if (config->pcie_wake_enable)
southcluster_smm_save_param(
SMM_SAVE_PARAM_PCIE_WAKE_ENABLE, 1);
}

3
src/soc/intel/baytrail/romstage/pmc.c
View File

@@ -47,8 +47,7 @@ void punit_init(void)
rid = pci_read_config8(IOSF_PCI_DEV, REVID);
dev = pcidev_on_root(SOC_DEV, SOC_FUNC);
if (dev)
cfg = dev->chip_info;
cfg = config_of(dev);
reg = iosf_punit_read(SB_BIOS_CONFIG);
/* Write bits 17:16 of SB_BIOS_CONFIG in the PUNIT. */

11
src/soc/intel/baytrail/sata.c
View File

@@ -36,18 +36,13 @@ static inline void sir_write(struct device *dev, int idx, u32 value)
static void sata_init(struct device *dev)
{
config_t *config = dev->chip_info;
config_t *config = config_of(dev);
u32 reg32;
u16 reg16;
u8 reg8;
printk(BIOS_DEBUG, "SATA: Initializing...\n");
if (config == NULL) {
printk(BIOS_ERR, "SATA: ERROR: Device not in devicetree.cb!\n");
return;
}
if (!config->sata_ahci) {
/* Set legacy or native decoding mode */
if (config->ide_legacy_combined) {
@@ -158,14 +153,12 @@ static void sata_init(struct device *dev)
static void sata_enable(struct device *dev)
{
config_t *config = dev->chip_info;
config_t *config = config_of(dev);
u8 reg8;
u16 reg16;
u32 reg32;
southcluster_enable_dev(dev);
if (!config)
return;
/* Port mapping -- mask off SPD + SMS + SC bits, then re-set */
reg16 = pci_read_config16(dev, 0x90);

5
src/soc/intel/baytrail/sd.c
View File

@@ -32,10 +32,7 @@
static void sd_init(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
if (config == NULL)
return;
struct soc_intel_baytrail_config *config = config_of(dev);
if (config->sdcard_cap_low != 0 || config->sdcard_cap_high != 0) {
printk(BIOS_DEBUG, "Overriding SD Card controller caps.\n");

2
src/soc/intel/baytrail/southcluster.c
View File

@@ -177,7 +177,7 @@ static void sc_init(struct device *dev)
u32 *gen_pmcon1 = (u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1);
u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
const struct baytrail_irq_route *ir = &global_baytrail_irq_route;
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
/* Set up the PIRQ PIC routing based on static config. */
for (i = 0; i < NUM_PIRQS; i++) {

2
src/soc/intel/baytrail/xhci.c
View File

@@ -197,7 +197,7 @@ static void xhci_route_all(struct device *dev)
static void xhci_init(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct soc_intel_baytrail_config *config = config_of(dev);
struct reg_script xhci_hc_init[] = {
/* Initialize clock gating */
REG_SCRIPT_NEXT(xhci_clock_gating_script),