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soc/intel/apollolake: Consolidate ISH enabling

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Since the Integrated Sensor Hub can be disabled through devicetree.cb
as a PCI device, there is no need for a separate register variable.
Remove handling the register and update mainboards' devicetrees. Also
keep ISH disabled on both Reef and Amenia.

Change-Id: I90dbf57b353ae1b80295ecf39877b10ed21de146
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/15710
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Andrey Petrov
2016-07-14 09:52:00 -07:00
committed by Aaron Durbin
parent d779605c29
commit 89e7b49a11
4 changed files with 2 additions and 15 deletions
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src/soc/intel/apollolake/chip.c
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@@ -396,8 +396,6 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)
if (cfg->emmc_rx_cmd_data_cntl2 != 0)
silconfig->EmmcRxCmdDataCntl2 = cfg->emmc_rx_cmd_data_cntl2;
silconfig->IshEnable = cfg->integrated_sensor_hub_enable;
silconfig->LPSS_S0ixEnable = cfg->lpss_s0ix_enable;
/* Disable setting of EISS bit in FSP. */