mainboard/hp: Add HP Elitebook 8770w
This is based on the code from the 8470p port. Tested on the quad core/quad SODIMM version. This laptop uses discrete MXM 3.0b graphics cards. Tested working with both Quadro K3000M and GTX 980M 8GB. The laptop must be completely disassembled down to the motherboard to perform the initial flash, subsequent flashes can be done internally via flashrom. There is a simple mod that can be performed to make subsequent external flashes easier in case of a brick, I'll put more information on this on the wiki later. The lack of an MXM structure built in to the firmware causes the GPU to enter a mode with nerfed performance, there is a workaround though, I'll add this to the wiki as well. I have no info on EHCI debugging. Tested and working: - memory: 4G+4G, 4G+4G+4G+4G - Linux (Debian Stretch with kernel 4.9.0) booted from SeaBIOS payload with graphics init disabled in coreboot. I allowed SeaBIOS to load the VBIOS from the MXM. - WLAN - keyboard, trackpoint and touchpad - USB - serial port on dock - fan control - VGA - DisplayPort - Audio - Both HDD SATA ports, ODD SATA, eSATA - S3 with SeaBIOS 1.11, SERCON must be disabled - Brightness and volume FN keys - Mute and calculator hotkeys - Status LEDs - Bluetooth Not working: - GRUB2 as payload will freeze. Has something to do with at_keyboard module. The built in keyboard requires this module to function though. - Sleep FN key - WiFi toggle and internet browser hotkeys - S3 fails to resume (restarts) if the laptop is removed from AC power, or gets unplugged and then plugged back in while suspended. Sleep status LEDs remain normal during this process. Change-Id: Ic4ff64e9cf0c7a51ac48ca2fe6fe8beab02e9f9a Signed-off-by: Robert Reeves <xiinc37@gmail.com> Reviewed-on: https://review.coreboot.org/23651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
This commit is contained in:
xiinc37
committed by
Philipp Deppenwiese
Philipp Deppenwiese
parent
4c518e18e3
commit
8a2b7f31fb
147
src/mainboard/hp/8770w/devicetree.cb
Normal file
147
src/mainboard/hp/8770w/devicetree.cb
Normal file
@@ -0,0 +1,147 @@
|
||||
#
|
||||
# This file is part of the coreboot project.
|
||||
#
|
||||
# Copyright (C) 2017 Iru Cai <mytbk920423@gmail.com>
|
||||
# Copyright (C) 2018 Robert Reeves
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
|
||||
chip northbridge/intel/sandybridge
|
||||
device cpu_cluster 0x0 on
|
||||
chip cpu/intel/socket_rPGA989
|
||||
device lapic 0x0 on
|
||||
end
|
||||
end
|
||||
chip cpu/intel/model_206ax
|
||||
register "c1_acpower" = "1"
|
||||
register "c1_battery" = "1"
|
||||
register "c2_acpower" = "3"
|
||||
register "c2_battery" = "3"
|
||||
register "c3_acpower" = "5"
|
||||
register "c3_battery" = "5"
|
||||
device lapic 0xacac off
|
||||
end
|
||||
end
|
||||
end
|
||||
device domain 0x0 on
|
||||
device pci 00.0 on # Host bridge
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 01.0 on # PCIe Bridge for discrete graphics
|
||||
device pci 00.0 on end # GPU
|
||||
device pci 00.1 on end # HDMI Audio on GPU
|
||||
end
|
||||
device pci 02.0 off # Internal graphics VGA controller
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
|
||||
chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
|
||||
register "c2_latency" = "0x0065"
|
||||
register "docking_supported" = "0"
|
||||
register "gen1_dec" = "0x007c0201"
|
||||
register "gen2_dec" = "0x000c0101"
|
||||
register "gen3_dec" = "0x00fcfe01"
|
||||
register "gen4_dec" = "0x000402e9"
|
||||
register "gpi6_routing" = "2"
|
||||
register "p_cnt_throttling_supported" = "1"
|
||||
register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
|
||||
register "pcie_port_coalesce" = "1"
|
||||
register "sata_interface_speed_support" = "0x3"
|
||||
register "sata_port_map" = "0x1f"
|
||||
register "superspeed_capable_ports" = "0x0000000f"
|
||||
register "xhci_overcurrent_mapping" = "0x00000c03"
|
||||
register "xhci_switchable_ports" = "0x0000000f"
|
||||
|
||||
register "spi_uvscc" = "0x2005"
|
||||
register "spi_lvscc" = "0"
|
||||
|
||||
device pci 14.0 on # USB 3.0 Controller
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 16.0 on # Management Engine Interface 1
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 16.1 off # Management Engine Interface 2
|
||||
end
|
||||
device pci 16.2 off # Management Engine IDE-R
|
||||
end
|
||||
device pci 16.3 off # Management Engine KT
|
||||
end
|
||||
device pci 19.0 on # Intel Gigabit Ethernet
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1a.0 on # USB2 EHCI #2
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1b.0 on # High Definition Audio Audio controller
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1c.0 on # PCIe Port #1
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1c.1 on # PCIe Port #2
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1c.2 on # Media Card and FireWire host controller
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1c.3 on # Wireless LAN Adapter
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1c.4 on # SATA Controller 2 for dock
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1c.5 off # PCIe Port #6
|
||||
end
|
||||
device pci 1c.6 off # PCIe Port #7
|
||||
end
|
||||
device pci 1c.7 off # PCIe Port #8
|
||||
end
|
||||
device pci 1d.0 on # USB2 EHCI #1
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1e.0 off # PCI bridge
|
||||
end
|
||||
device pci 1f.0 on # LPC bridge PCI-LPC bridge
|
||||
subsystemid 0x103c 0x176c
|
||||
chip ec/hp/kbc1126
|
||||
register "ec_data_port" = "0x62"
|
||||
register "ec_cmd_port" = "0x66"
|
||||
register "ec_ctrl_reg" = "0x81"
|
||||
register "ec_fan_ctrl_value" = "0x81"
|
||||
device pnp ff.1 off end
|
||||
end # kbc1126
|
||||
chip superio/smsc/lpc47n217
|
||||
device pnp 4e.3 on # Parallel
|
||||
io 0x60 = 0x378
|
||||
irq 0x70 = 7
|
||||
end
|
||||
device pnp 4e.4 on # Com1
|
||||
io 0x60 = 0x3f8
|
||||
irq 0x70 = 4
|
||||
end
|
||||
device pnp 4e.5 off # Com2
|
||||
end
|
||||
end #chip superio/smsc/lpc47n217
|
||||
end
|
||||
device pci 1f.2 on # SATA Controller 1
|
||||
subsystemid 0x103c 0x176c
|
||||
end
|
||||
device pci 1f.3 off # SMBus
|
||||
end
|
||||
device pci 1f.5 off # SATA Controller 2
|
||||
end
|
||||
device pci 1f.6 off # Thermal
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
Reference in New Issue
Block a user