ICH7: Fix register naming error

There's an off-by-one error in the ACPI GP_LVL declaration:
it declares GL00 with a bit count of 6, and continues with GP07
afterwards. This should be GP06, as the first bitfield covers
GP00-GP05.

While at it, change it to GP00-GP05, as right now GL00 isn't used,
and single bitfield are more usable here.

Also adjust the Getac P470, as this is the only user of those defintions
right now.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Sven Schnelle
2011-04-01 07:28:35 +00:00
parent 0df0b52568
commit 8a539b6678
2 changed files with 39 additions and 33 deletions

View File

@@ -59,29 +59,35 @@ Scope(\)
GIO2, 8,
GIO3, 8,
Offset(0x0c), // GPIO Level
GL00, 6,
GP07, 1, // GDET
GP00, 1,
GP01, 1,
GP02, 1,
GP03, 1,
GP04, 1,
GP05, 1,
GP06, 1, // GDET
GP07, 1,
GP08, 1,
GP09, 1,
GP10, 1, // HPMU
GP11, 1, // GPSE
GP12, 1,
GP13, 1, // WLED
GP14, 1, // BLED
GP15, 1, // GLED
GP16, 1, // GDIS
GP09, 1, // HPMU
GP10, 1, // GPSE
GP11, 1,
GP12, 1, // WLED
GP13, 1, // BLED
GP14, 1, // GLED
GP15, 1, // GDIS
GP16, 1,
GP17, 1,
GP18, 1,
GP19, 1, // SPCI
GP20, 1, // TSDT
GP21, 1, // SCPU
GP18, 1, // SPCI
GP19, 1, // TSDT
GP20, 1, // SCPU
GP21, 1,
GP22, 1,
GP23, 1,
GP24, 1, // LANP
GP25, 1, // DKLR
GP26, 1, // WLAN
GP27, 1, // SATA_PWR_EN #0 / SPOF
GP28, 1, // SATA_PWR_EN #1 / SPMU
GP23, 1, // LANP
GP24, 1, // DKLR
GP25, 1, // WLAN
GP26, 1, // SATA_PWR_EN #0 / SPOF
GP27, 1, // SATA_PWR_EN #1 / SPMU
GP28, 1,
GP29, 1,
GP30, 1,
GP31, 1,