from Yh Lu
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
@@ -48,7 +48,6 @@ uses CONFIG_CHIP_CONFIGURE
|
||||
uses XIP_ROM_SIZE
|
||||
uses XIP_ROM_BASE
|
||||
uses LINUXBIOS_EXTRA_VERSION
|
||||
uses FAKE_SPDROM
|
||||
uses CC
|
||||
|
||||
option CC="gcc -m32"
|
||||
@@ -74,8 +73,6 @@ option HAVE_OPTION_TABLE=1
|
||||
option CONFIG_ROM_STREAM=1
|
||||
option HAVE_FALLBACK_BOOT=1
|
||||
|
||||
option FAKE_SPDROM=1
|
||||
|
||||
###
|
||||
### Compute the location and size of where this firmware image
|
||||
### (linuxBIOS plus bootloader) will live in the boot rom chip.
|
||||
|
@@ -98,7 +98,7 @@ option CONFIG_CHIP_CONFIGURE=1
|
||||
### Build code to export a programmable irq routing table
|
||||
###
|
||||
option HAVE_PIRQ_TABLE=1
|
||||
option IRQ_SLOT_COUNT=13
|
||||
option IRQ_SLOT_COUNT=12
|
||||
#
|
||||
###
|
||||
### Build code for SMP support
|
||||
|
@@ -76,7 +76,7 @@ option k7=1
|
||||
option k8=1
|
||||
option ROM_SIZE=524288
|
||||
|
||||
option HAVE_HARD_RESET=1
|
||||
option HAVE_HARD_RESET=0
|
||||
|
||||
#option CONFIG_VGABIOS=1
|
||||
#option CONFIG_REALMODE_IDT=1
|
||||
|
Reference in New Issue
Block a user