cpu/x86: Flip SMM_TSEG default

This is only a qualifier between TSEG and ASEG.

Change-Id: I8051df92d9014e3574f6e7d5b6f1d6677fe77c82
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

src/cpu/intel/fsp_model_406dx/Kconfig

@@ -35,6 +35,7 @@ config CPU_SPECIFIC_OPTIONS
 	select TSC_SYNC_MFENCE
 	select LAPIC_MONOTONIC_TIMER
 	select CPU_INTEL_COMMON
+	select NO_SMM
 
 	# Microcode header files are delivered in FSP package
 	select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN

src/cpu/intel/haswell/Kconfig

@@ -16,7 +16,6 @@ config CPU_SPECIFIC_OPTIONS
 	select SSE2
 	select UDELAY_TSC
 	select TSC_CONSTANT_RATE
-	select SMM_TSEG
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	#select AP_IN_SIPI_WAIT
 	select TSC_SYNC_MFENCE

src/cpu/intel/model_2065x/Kconfig

@@ -14,7 +14,6 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_TSC
 	select TSC_CONSTANT_RATE
 	select TSC_MONOTONIC_TIMER
-	select SMM_TSEG
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select PARALLEL_CPU_INIT
 	#select AP_IN_SIPI_WAIT

src/cpu/intel/model_206ax/Kconfig

@@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_TSC
 	select TSC_CONSTANT_RATE
 	select TSC_MONOTONIC_TIMER
-	select SMM_TSEG
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	#select AP_IN_SIPI_WAIT
 	select TSC_SYNC_MFENCE

src/cpu/intel/slot_1/Kconfig

@@ -25,6 +25,7 @@ config SLOT_SPECIFIC_OPTIONS # dummy
 	select CPU_INTEL_MODEL_68X
 	select CPU_INTEL_MODEL_6BX
 	select CPU_INTEL_MODEL_6XX
+	select NO_SMM
 
 config DCACHE_RAM_BASE
 	hex