cpu/x86: Flip SMM_TSEG default

This is only a qualifier between TSEG and ASEG.

Change-Id: I8051df92d9014e3574f6e7d5b6f1d6677fe77c82
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Kyösti Mälkki
2019-07-08 09:56:00 +03:00
parent 4d372c7353
commit 8abf66e4e0
22 changed files with 14 additions and 24 deletions

View File

@@ -28,7 +28,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select INTEL_GMA_SSC_ALTERNATE_REF
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select SMM_TSEG
select PARALLEL_MP
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM

View File

@@ -29,7 +29,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select SMM_TSEG
select PARALLEL_MP
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM

View File

@@ -30,7 +30,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select INTEL_GMA_ACPI
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select SMM_TSEG
select PARALLEL_MP
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
select C_ENVIRONMENT_BOOTBLOCK

View File

@@ -28,7 +28,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select CACHE_MRC_SETTINGS
select POSTCAR_STAGE
select POSTCAR_CONSOLE
select SMM_TSEG
select PARALLEL_MP
select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM