cpu/x86: Flip SMM_TSEG default

This is only a qualifier between TSEG and ASEG.

Change-Id: I8051df92d9014e3574f6e7d5b6f1d6677fe77c82
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Kyösti Mälkki
2019-07-08 09:56:00 +03:00
parent 4d372c7353
commit 8abf66e4e0
22 changed files with 14 additions and 24 deletions

View File

@@ -63,7 +63,6 @@ config CPU_SPECIFIC_OPTIONS
select PMC_INVALID_READ_AFTER_WRITE
select PMC_GLOBAL_RESET_ENABLE_LOCK
select REG_SCRIPT
select SMM_TSEG
select SA_ENABLE_IMR
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE

View File

@@ -24,7 +24,6 @@ config CPU_SPECIFIC_OPTIONS
select PCIEXP_COMMON_CLOCK
select REG_SCRIPT
select RTC
select SMM_TSEG
select SMP
select SPI_FLASH
select SSE2

View File

@@ -34,7 +34,6 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_RESET
select SMM_TSEG
select SMP
select SPI_FLASH
select SSE2

View File

@@ -26,7 +26,6 @@ config CPU_SPECIFIC_OPTIONS
select REG_SCRIPT
select PARALLEL_MP
select RTC
select SMM_TSEG
select SMP
select SPI_FLASH
select SSE2

View File

@@ -80,7 +80,6 @@ config CPU_SPECIFIC_OPTIONS
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select REG_SCRIPT
select SMM_TSEG
select SMP
select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK

View File

@@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
select C_ENVIRONMENT_BOOTBLOCK
select IOAPIC
select HAVE_SMI_HANDLER
select SMM_TSEG
select CACHE_MRC_SETTINGS
select PARALLEL_MP
select PCR_COMMON_IOSF_1_0

View File

@@ -33,7 +33,6 @@ config CPU_SPECIFIC_OPTIONS
select NO_RELOCATABLE_RAMSTAGE
select PARALLEL_MP
select REG_SCRIPT
select SMM_TSEG
select SMP
select SPI_FLASH
select SSE2

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@@ -21,7 +21,6 @@ config CPU_SPECIFIC_OPTIONS
select UDELAY_TSC
select SUPPORT_CPU_UCODE_IN_CBFS
select INTEL_DESCRIPTOR_MODE_CAPABLE
select SMM_TSEG
select HAVE_SMI_HANDLER
select TSC_MONOTONIC_TIMER
select TSC_CONSTANT_RATE

View File

@@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
select POSTCAR_CONSOLE
select POSTCAR_STAGE
select REG_SCRIPT
select SMM_TSEG
select SMP
select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK

View File

@@ -50,7 +50,6 @@ config CPU_SPECIFIC_OPTIONS
select PCIEX_LENGTH_64MB
select REG_SCRIPT
select SA_ENABLE_DPR
select SMM_TSEG
select SMP
select PMC_GLOBAL_RESET_ENABLE_LOCK
select SOC_INTEL_COMMON