cpu/x86: Flip SMM_TSEG default
This is only a qualifier between TSEG and ASEG. Change-Id: I8051df92d9014e3574f6e7d5b6f1d6677fe77c82 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34135 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@@ -63,7 +63,6 @@ config CPU_SPECIFIC_OPTIONS
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select PMC_INVALID_READ_AFTER_WRITE
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select PMC_GLOBAL_RESET_ENABLE_LOCK
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select REG_SCRIPT
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select SMM_TSEG
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select SA_ENABLE_IMR
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select SOC_INTEL_COMMON
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select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
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@@ -24,7 +24,6 @@ config CPU_SPECIFIC_OPTIONS
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select PCIEXP_COMMON_CLOCK
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select REG_SCRIPT
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select RTC
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select SMM_TSEG
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select SMP
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select SPI_FLASH
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select SSE2
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@@ -34,7 +34,6 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK
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select SOC_INTEL_COMMON_BLOCK_HDA
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select SOC_INTEL_COMMON_RESET
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select SMM_TSEG
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select SMP
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select SPI_FLASH
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select SSE2
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@@ -26,7 +26,6 @@ config CPU_SPECIFIC_OPTIONS
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select REG_SCRIPT
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select PARALLEL_MP
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select RTC
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select SMM_TSEG
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select SMP
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select SPI_FLASH
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select SSE2
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@@ -80,7 +80,6 @@ config CPU_SPECIFIC_OPTIONS
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select POSTCAR_CONSOLE
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select POSTCAR_STAGE
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select REG_SCRIPT
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select SMM_TSEG
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select SMP
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select SOC_AHCI_PORT_IMPLEMENTED_INVERT
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select PMC_GLOBAL_RESET_ENABLE_LOCK
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@@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
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select C_ENVIRONMENT_BOOTBLOCK
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select IOAPIC
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select HAVE_SMI_HANDLER
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select SMM_TSEG
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select CACHE_MRC_SETTINGS
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select PARALLEL_MP
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select PCR_COMMON_IOSF_1_0
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@@ -33,7 +33,6 @@ config CPU_SPECIFIC_OPTIONS
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select NO_RELOCATABLE_RAMSTAGE
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select PARALLEL_MP
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select REG_SCRIPT
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select SMM_TSEG
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select SMP
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select SPI_FLASH
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select SSE2
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@@ -21,7 +21,6 @@ config CPU_SPECIFIC_OPTIONS
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select UDELAY_TSC
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select SUPPORT_CPU_UCODE_IN_CBFS
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select INTEL_DESCRIPTOR_MODE_CAPABLE
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select SMM_TSEG
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select HAVE_SMI_HANDLER
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select TSC_MONOTONIC_TIMER
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select TSC_CONSTANT_RATE
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@@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
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select POSTCAR_CONSOLE
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select POSTCAR_STAGE
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select REG_SCRIPT
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select SMM_TSEG
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select SMP
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select SOC_AHCI_PORT_IMPLEMENTED_INVERT
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select PMC_GLOBAL_RESET_ENABLE_LOCK
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@@ -50,7 +50,6 @@ config CPU_SPECIFIC_OPTIONS
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select PCIEX_LENGTH_64MB
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select REG_SCRIPT
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select SA_ENABLE_DPR
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select SMM_TSEG
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select SMP
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select PMC_GLOBAL_RESET_ENABLE_LOCK
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select SOC_INTEL_COMMON
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