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soc/intel/common: Fix typo mistake in cache_as_ram.S

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Change-Id: I14c0e87012bdbaaff50844ed097b66e2221b1e08
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34818
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
This commit is contained in:
Subrata Banik
2019-08-10 21:43:12 +05:30
parent e2e1f12265
commit 8adaffcbed
1 changed files with 1 additions and 1 deletions
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src/soc/intel/common/block/cpu/car/cache_as_ram.S
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@@ -365,7 +365,7 @@ find_llc_subleaf:
jnz find_llc_subleaf
/*
* Set MSR 0xC91 IA32_L3_MASK_! = 0xE/0xFE/0xFFE/0xFFFE
* Set MSR 0xC91 IA32_L3_MASK_1 = 0xE/0xFE/0xFFE/0xFFFE
* for 4/8/16 way of LLC
*/
shr $22, %ebx