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cpu/x86/smm: allow SSE instructions in SMM modules

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If SSE instructions are enabled in the build assume the SMM
modules are compiled with SSE instructions. As such enable
the SSE instructions in SMM mode by setting up the cr4 register.
In addition, provide a place to save and restore the SSE state
in both the relocation handler and permanent handler.

Change-Id: Ifa16876b57544919fde88fba5b8f18e4ca286841
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/20244
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Aaron Durbin
2017-06-16 15:16:13 -05:00
committed by Martin Roth
parent 604f69868f
commit 8ade68a270
3 changed files with 81 additions and 4 deletions
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7
src/cpu/x86/sipi_vector.S
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@ -185,6 +185,13 @@ load_msr:
and $~(CR0_CLEAR_FLAGS_CACHE_ENABLE), %eax
mov %eax, %cr0
#if IS_ENABLED(CONFIG_SSE)
/* Enable sse instructions. */
mov %cr4, %eax
orl $(CR4_OSFXSR | CR4_OSXMMEXCPT), %eax
mov %eax, %cr4
#endif
/* c_handler(cpu_num) */
push %esi /* cpu_num */
mov c_handler, %eax