libpayload: Initial ARMv7 port
This compiles, but it's not tested yet. Change-Id: I2f73a814649aa36c39af3e77cefd8a968671f5c0 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2035 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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Ronald G. Minnich
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payloads/libpayload/arch/armv7/memset.S
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126
payloads/libpayload/arch/armv7/memset.S
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/*
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* linux/arch/arm/lib/memset.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* ASM optimised string functions
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*/
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#include "assembler.h"
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.text
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.align 5
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.word 0
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1: subs r2, r2, #4 @ 1 do we have enough
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blt 5f @ 1 bytes to align with?
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cmp r3, #2 @ 1
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strltb r1, [r0], #1 @ 1
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strleb r1, [r0], #1 @ 1
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strb r1, [r0], #1 @ 1
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add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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/*
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* The pointer is now aligned and the length is adjusted. Try doing the
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* memset again.
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*/
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.globl memset
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memset:
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ands r3, r0, #3 @ 1 unaligned?
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bne 1b @ 1
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/*
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* we know that the pointer in r0 is aligned to a word boundary.
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*/
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orr r1, r1, r1, lsl #8
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orr r1, r1, r1, lsl #16
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mov r3, r1
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cmp r2, #16
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blt 4f
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#if ! CALGN(1)+0
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/*
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* We need an extra register for this loop - save the return address and
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* use the LR
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*/
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str lr, [sp, #-4]!
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mov ip, r1
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mov lr, r1
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2: subs r2, r2, #64
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stmgeia r0!, {r1, r3, ip, lr} @ 64 bytes at a time.
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stmgeia r0!, {r1, r3, ip, lr}
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stmgeia r0!, {r1, r3, ip, lr}
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stmgeia r0!, {r1, r3, ip, lr}
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bgt 2b
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ldmeqfd sp!, {pc} @ Now <64 bytes to go.
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/*
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* No need to correct the count; we're only testing bits from now on
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*/
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tst r2, #32
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stmneia r0!, {r1, r3, ip, lr}
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stmneia r0!, {r1, r3, ip, lr}
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tst r2, #16
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stmneia r0!, {r1, r3, ip, lr}
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ldr lr, [sp], #4
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#else
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/*
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* This version aligns the destination pointer in order to write
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* whole cache lines at once.
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*/
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stmfd sp!, {r4-r7, lr}
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mov r4, r1
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mov r5, r1
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mov r6, r1
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mov r7, r1
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mov ip, r1
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mov lr, r1
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cmp r2, #96
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tstgt r0, #31
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ble 3f
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and ip, r0, #31
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rsb ip, ip, #32
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sub r2, r2, ip
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movs ip, ip, lsl #(32 - 4)
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stmcsia r0!, {r4, r5, r6, r7}
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stmmiia r0!, {r4, r5}
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tst ip, #(1 << 30)
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mov ip, r1
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strne r1, [r0], #4
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3: subs r2, r2, #64
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stmgeia r0!, {r1, r3-r7, ip, lr}
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stmgeia r0!, {r1, r3-r7, ip, lr}
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bgt 3b
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ldmeqfd sp!, {r4-r7, pc}
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tst r2, #32
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stmneia r0!, {r1, r3-r7, ip, lr}
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tst r2, #16
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stmneia r0!, {r4-r7}
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ldmfd sp!, {r4-r7, lr}
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#endif
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4: tst r2, #8
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stmneia r0!, {r1, r3}
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tst r2, #4
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strne r1, [r0], #4
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/*
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* When we get here, we've got less than 4 bytes to zero. We
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* may have an unaligned pointer as well.
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*/
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5: tst r2, #2
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strneb r1, [r0], #1
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strneb r1, [r0], #1
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tst r2, #1
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strneb r1, [r0], #1
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mov pc, lr
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