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AMD: Kconfig cleanup

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Change-Id: Ie347b32575c26133d52c275622d29d1cd4c6c0c7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3623
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
Kyösti Mälkki
2013-07-07 11:30:48 +03:00
committed by Stefan Reinauer
parent 3ad5a9b97f
commit 8b95c13420
10 changed files with 32 additions and 67 deletions
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12
src/cpu/amd/agesa/family12/Kconfig
View File

@@ -22,49 +22,43 @@ config CPU_AMD_AGESA_FAMILY12
select PCI_IO_CFG_EXT select PCI_IO_CFG_EXT
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY12
config CPU_ADDR_BITS config CPU_ADDR_BITS
int int
default 48 default 48
depends on CPU_AMD_AGESA_FAMILY12
config CPU_SOCKET_TYPE config CPU_SOCKET_TYPE
hex hex
default 0x10 default 0x10
depends on CPU_AMD_AGESA_FAMILY12
# DDR2 and REG # DDR2 and REG
config DIMM_SUPPORT config DIMM_SUPPORT
hex hex
default 0x0104 default 0x0104
depends on CPU_AMD_AGESA_FAMILY12
config EXT_RT_TBL_SUPPORT config EXT_RT_TBL_SUPPORT
bool bool
default n default n
depends on CPU_AMD_AGESA_FAMILY12
config EXT_CONF_SUPPORT config EXT_CONF_SUPPORT
bool bool
default n default n
depends on CPU_AMD_AGESA_FAMILY12
config CBB config CBB
hex hex
default 0x0 default 0x0
depends on CPU_AMD_AGESA_FAMILY12
config CDB config CDB
hex hex
default 0x18 default 0x18
depends on CPU_AMD_AGESA_FAMILY12
config XIP_ROM_SIZE config XIP_ROM_SIZE
hex hex
default 0x80000 default 0x80000
depends on CPU_AMD_AGESA_FAMILY12
config HAVE_INIT_TIMER config HAVE_INIT_TIMER
bool bool
default y default y
depends on CPU_AMD_AGESA_FAMILY12
endif

14
src/cpu/amd/agesa/family14/Kconfig
View File

@@ -22,54 +22,48 @@ config CPU_AMD_AGESA_FAMILY14
select PCI_IO_CFG_EXT select PCI_IO_CFG_EXT
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY14
config CPU_ADDR_BITS config CPU_ADDR_BITS
int int
default 36 default 36
depends on CPU_AMD_AGESA_FAMILY14
config CPU_SOCKET_TYPE config CPU_SOCKET_TYPE
hex hex
default 0x10 default 0x10
depends on CPU_AMD_AGESA_FAMILY14
# DDR2 and REG # DDR2 and REG
config DIMM_SUPPORT config DIMM_SUPPORT
hex hex
default 0x0104 default 0x0104
depends on CPU_AMD_AGESA_FAMILY14
config EXT_RT_TBL_SUPPORT config EXT_RT_TBL_SUPPORT
bool bool
default n default n
depends on CPU_AMD_AGESA_FAMILY14
config EXT_CONF_SUPPORT config EXT_CONF_SUPPORT
bool bool
default n default n
depends on CPU_AMD_AGESA_FAMILY14
config CBB config CBB
hex hex
default 0x0 default 0x0
depends on CPU_AMD_AGESA_FAMILY14
config CDB config CDB
hex hex
default 0x18 default 0x18
depends on CPU_AMD_AGESA_FAMILY14
config XIP_ROM_SIZE config XIP_ROM_SIZE
hex hex
default 0x80000 default 0x80000
depends on CPU_AMD_AGESA_FAMILY14
config HAVE_INIT_TIMER config HAVE_INIT_TIMER
bool bool
default y default y
depends on CPU_AMD_AGESA_FAMILY14
config HIGH_SCRATCH_MEMORY_SIZE config HIGH_SCRATCH_MEMORY_SIZE
hex hex
# Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000) # Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000)
default 0x71000 default 0x71000
depends on CPU_AMD_AGESA_FAMILY14
endif

5
src/cpu/amd/agesa/family15/Kconfig
View File

@@ -22,12 +22,11 @@ config CPU_AMD_AGESA_FAMILY15
select PCI_IO_CFG_EXT select PCI_IO_CFG_EXT
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY15
config CPU_ADDR_BITS config CPU_ADDR_BITS
int int
default 48 default 48
depends on CPU_AMD_AGESA_FAMILY15
if CPU_AMD_AGESA_FAMILY15
config CPU_AMD_SOCKET_G34 config CPU_AMD_SOCKET_G34
bool bool

19
src/cpu/amd/agesa/family15tn/Kconfig
View File

@@ -22,59 +22,48 @@ config CPU_AMD_AGESA_FAMILY15_TN
select PCI_IO_CFG_EXT select PCI_IO_CFG_EXT
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY15_TN
config CPU_ADDR_BITS config CPU_ADDR_BITS
int int
default 48 default 48
depends on CPU_AMD_AGESA_FAMILY15_TN
config CPU_SOCKET_TYPE config CPU_SOCKET_TYPE
hex hex
default 0x10 default 0x10
depends on CPU_AMD_AGESA_FAMILY15_TN
# DDR2 and REG # DDR2 and REG
config DIMM_SUPPORT config DIMM_SUPPORT
hex hex
default 0x0104 default 0x0104
depends on CPU_AMD_AGESA_FAMILY15_TN
config EXT_RT_TBL_SUPPORT config EXT_RT_TBL_SUPPORT
bool bool
default n default n
depends on CPU_AMD_AGESA_FAMILY15_TN
config EXT_CONF_SUPPORT config EXT_CONF_SUPPORT
bool bool
default n default n
depends on CPU_AMD_AGESA_FAMILY15_TN
config CBB config CBB
hex hex
default 0x0 default 0x0
depends on CPU_AMD_AGESA_FAMILY15_TN
config CDB config CDB
hex hex
default 0x18 default 0x18
depends on CPU_AMD_AGESA_FAMILY15_TN
config XIP_ROM_BASE
hex
default 0xfff80000
depends on CPU_AMD_AGESA_FAMILY15_TN
config XIP_ROM_SIZE config XIP_ROM_SIZE
hex hex
default 0x100000 default 0x100000
depends on CPU_AMD_AGESA_FAMILY15_TN
config HAVE_INIT_TIMER config HAVE_INIT_TIMER
bool bool
default y default y
depends on CPU_AMD_AGESA_FAMILY15_TN
config HIGH_SCRATCH_MEMORY_SIZE config HIGH_SCRATCH_MEMORY_SIZE
hex hex
# Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000) # Assume the maximum size of stack as (0xA0000 - 0x30000 + 0x1000)
default 0xA1000 default 0xA1000
depends on CPU_AMD_AGESA_FAMILY15_TN
endif

1
src/cpu/amd/model_10xxx/Kconfig
View File

@@ -7,6 +7,7 @@ config CPU_AMD_MODEL_10XXX
select UDELAY_LAPIC select UDELAY_LAPIC
if CPU_AMD_MODEL_10XXX if CPU_AMD_MODEL_10XXX
config CPU_ADDR_BITS config CPU_ADDR_BITS
int int
default 48 default 48

10
src/cpu/amd/socket_AM2r2/Kconfig
View File

@@ -6,32 +6,30 @@ config CPU_AMD_SOCKET_AM2R2
select CACHE_AS_RAM select CACHE_AS_RAM
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_SOCKET_AM2R2
config CPU_SOCKET_TYPE config CPU_SOCKET_TYPE
hex hex
default 0x11 default 0x11
depends on CPU_AMD_SOCKET_AM2R2
config EXT_RT_TBL_SUPPORT config EXT_RT_TBL_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_AM2R2
config EXT_CONF_SUPPORT config EXT_CONF_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_AM2R2
config CBB config CBB
hex hex
default 0x0 default 0x0
depends on CPU_AMD_SOCKET_AM2R2
config CDB config CDB
hex hex
default 0x18 default 0x18
depends on CPU_AMD_SOCKET_AM2R2
config XIP_ROM_SIZE config XIP_ROM_SIZE
hex hex
default 0x80000 default 0x80000
depends on CPU_AMD_SOCKET_AM2R2
endif

9
src/cpu/amd/socket_AM3/Kconfig
View File

@@ -6,33 +6,30 @@ config CPU_AMD_SOCKET_AM3
select CACHE_AS_RAM select CACHE_AS_RAM
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_SOCKET_AM3
config CPU_SOCKET_TYPE config CPU_SOCKET_TYPE
hex hex
default 0x11 default 0x11
depends on CPU_AMD_SOCKET_AM3
config EXT_RT_TBL_SUPPORT config EXT_RT_TBL_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_AM3
config EXT_CONF_SUPPORT config EXT_CONF_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_AM3
config CBB config CBB
hex hex
default 0x0 default 0x0
depends on CPU_AMD_SOCKET_AM3
config CDB config CDB
hex hex
default 0x18 default 0x18
depends on CPU_AMD_SOCKET_AM3
config XIP_ROM_SIZE config XIP_ROM_SIZE
hex hex
default 0x80000 default 0x80000
depends on CPU_AMD_SOCKET_AM3
endif

10
src/cpu/amd/socket_ASB2/Kconfig
View File

@@ -6,32 +6,30 @@ config CPU_AMD_SOCKET_ASB2
select CACHE_AS_RAM select CACHE_AS_RAM
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_SOCKET_ASB2
config CPU_SOCKET_TYPE config CPU_SOCKET_TYPE
hex hex
default 0x13 default 0x13
depends on CPU_AMD_SOCKET_ASB2
config EXT_RT_TBL_SUPPORT config EXT_RT_TBL_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_ASB2
config EXT_CONF_SUPPORT config EXT_CONF_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_ASB2
config CBB config CBB
hex hex
default 0x0 default 0x0
depends on CPU_AMD_SOCKET_ASB2
config CDB config CDB
hex hex
default 0x18 default 0x18
depends on CPU_AMD_SOCKET_ASB2
config XIP_ROM_SIZE config XIP_ROM_SIZE
hex hex
default 0x80000 default 0x80000
depends on CPU_AMD_SOCKET_ASB2
endif

9
src/cpu/amd/socket_C32/Kconfig
View File

@@ -6,33 +6,30 @@ config CPU_AMD_SOCKET_C32_NON_AGESA
select CACHE_AS_RAM select CACHE_AS_RAM
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_SOCKET_C32_NON_AGESA
config CPU_SOCKET_TYPE config CPU_SOCKET_TYPE
hex hex
default 0x14 default 0x14
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config EXT_RT_TBL_SUPPORT config EXT_RT_TBL_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config EXT_CONF_SUPPORT config EXT_CONF_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config CBB config CBB
hex hex
default 0x0 default 0x0
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config CDB config CDB
hex hex
default 0x18 default 0x18
depends on CPU_AMD_SOCKET_C32_NON_AGESA
config XIP_ROM_SIZE config XIP_ROM_SIZE
hex hex
default 0x80000 default 0x80000
depends on CPU_AMD_SOCKET_C32_NON_AGESA
endif

10
src/cpu/amd/socket_F_1207/Kconfig
View File

@@ -5,32 +5,30 @@ config CPU_AMD_SOCKET_F_1207
select CACHE_AS_RAM select CACHE_AS_RAM
select X86_AMD_FIXED_MTRRS select X86_AMD_FIXED_MTRRS
if CPU_AMD_SOCKET_F_1207
config CPU_SOCKET_TYPE config CPU_SOCKET_TYPE
hex hex
default 0x10 default 0x10
depends on CPU_AMD_SOCKET_F_1207
config EXT_RT_TBL_SUPPORT config EXT_RT_TBL_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_F_1207
config EXT_CONF_SUPPORT config EXT_CONF_SUPPORT
bool bool
default n default n
depends on CPU_AMD_SOCKET_F_1207
config CBB config CBB
hex hex
default 0x0 default 0x0
depends on CPU_AMD_SOCKET_F_1207
config CDB config CDB
hex hex
default 0x18 default 0x18
depends on CPU_AMD_SOCKET_F_1207
config XIP_ROM_SIZE config XIP_ROM_SIZE
hex hex
default 0x80000 default 0x80000
depends on CPU_AMD_SOCKET_F_1207
endif