soc/intel/xeon_sp/spr: Don't leak memory

Only call fill_pds() once to prevent leaking memory. Previously it was
called for every active stack on every socket.

Only call dump_pds() once to prevent spamming the console with the same
information.

Drop the return value since it's always returning success.

Change-Id: Ifa9609e9da086dc9731556014ea9b320b270d776
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80547
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Patrick Rudolph
2024-02-14 10:44:11 +01:00
committed by Lean Sheng Tan
parent eba383c20c
commit 8bbc07ef23
3 changed files with 10 additions and 10 deletions

View File

@@ -54,7 +54,7 @@ struct proximity_domains {
extern struct proximity_domains pds;
void dump_pds(void);
enum cb_err fill_pds(void);
void fill_pds(void);
/*
* Return the total size of memory regions in generic initiator affinity

View File

@@ -25,7 +25,7 @@ void dump_pds(void)
}
}
enum cb_err fill_pds(void)
void fill_pds(void)
{
uint8_t num_sockets = soc_get_num_cpus();
uint8_t num_cxlnodes = get_cxl_node_count();
@@ -72,7 +72,7 @@ enum cb_err fill_pds(void)
/* If there are no CXL nodes, we are done */
if (num_cxlnodes == 0)
return CB_SUCCESS;
return;
/* There are CXL nodes, fill in generic initiator domain after the processors pds */
uint8_t skt_id, cxl_id;
@@ -98,8 +98,6 @@ enum cb_err fill_pds(void)
}
}
}
return CB_SUCCESS;
}
/*

View File

@@ -329,11 +329,13 @@ static void mmapvtd_read_resources(struct device *dev)
int index = 0;
if (CONFIG(SOC_INTEL_HAS_CXL)) {
static bool once;
if (!once) {
/* Construct NUMA data structure. This is needed for CXL. */
if (fill_pds() != CB_SUCCESS)
pds.num_pds = 0;
fill_pds();
dump_pds();
once = true;
}
}
/* Read standard PCI resources. */