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soc/intel/elkhartlake: Make use of FSP_ARRAY_LOAD macro

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Use FSP_ARRAY_LOAD macro for checking and loading array type
configs into array type UPDs to increase readability.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I2562977e55f8909038697f7e19b82ec6b5e47fae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55553
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Lean Sheng Tan
2021-06-15 22:05:42 -07:00
committed by Werner Zeh
parent fefc2ea4c4
commit 8bbff1f554
2 changed files with 15 additions and 67 deletions
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48
src/soc/intel/elkhartlake/fsp_params.c
View File

@@ -66,53 +66,23 @@ static void parse_devicetree(FSP_S_CONFIG *params)
/* LPSS controllers configuration */
/* I2C */
_Static_assert(ARRAY_SIZE(params->SerialIoI2cMode) >=
ARRAY_SIZE(config->SerialIoI2cMode), "copy buffer overflow!");
memcpy(params->SerialIoI2cMode, config->SerialIoI2cMode,
sizeof(config->SerialIoI2cMode));
_Static_assert(ARRAY_SIZE(params->PchSerialIoI2cPadsTermination) >=
ARRAY_SIZE(config->SerialIoI2cPadsTermination),
"copy buffer overflow!");
memcpy(params->PchSerialIoI2cPadsTermination, config->SerialIoI2cPadsTermination,
sizeof(config->SerialIoI2cPadsTermination));
FSP_ARRAY_LOAD(params->SerialIoI2cMode, config->SerialIoI2cMode);
FSP_ARRAY_LOAD(params->PchSerialIoI2cPadsTermination,
config->SerialIoI2cPadsTermination);
params->PchSerialIoI2cSclPinMux[4] = 0x1B44AC09; //GPIO native mode for GPP_H9
params->PchSerialIoI2cSdaPinMux[4] = 0x1B44CC08; //GPIO native mode for GPP_H8
/* GSPI */
_Static_assert(ARRAY_SIZE(params->SerialIoSpiMode) >=
ARRAY_SIZE(config->SerialIoGSpiMode), "copy buffer overflow!");
memcpy(params->SerialIoSpiMode, config->SerialIoGSpiMode,
sizeof(config->SerialIoGSpiMode));
_Static_assert(ARRAY_SIZE(params->SerialIoSpiCsEnable) >=
ARRAY_SIZE(config->SerialIoGSpiCsEnable), "copy buffer overflow!");
memcpy(params->SerialIoSpiCsEnable, config->SerialIoGSpiCsEnable,
sizeof(config->SerialIoGSpiCsEnable));
_Static_assert(ARRAY_SIZE(params->SerialIoSpiCsMode) >=
ARRAY_SIZE(config->SerialIoGSpiCsMode), "copy buffer overflow!");
memcpy(params->SerialIoSpiCsMode, config->SerialIoGSpiCsMode,
sizeof(config->SerialIoGSpiCsMode));
_Static_assert(ARRAY_SIZE(params->SerialIoSpiCsState) >=
ARRAY_SIZE(config->SerialIoGSpiCsState), "copy buffer overflow!");
memcpy(params->SerialIoSpiCsState, config->SerialIoGSpiCsState,
sizeof(config->SerialIoGSpiCsState));
FSP_ARRAY_LOAD(params->SerialIoSpiMode, config->SerialIoGSpiMode);
FSP_ARRAY_LOAD(params->SerialIoSpiCsEnable, config->SerialIoGSpiCsEnable);
FSP_ARRAY_LOAD(params->SerialIoSpiCsMode, config->SerialIoGSpiCsMode);
FSP_ARRAY_LOAD(params->SerialIoSpiCsState, config->SerialIoGSpiCsState);
params->SerialIoSpiCsPolarity[2] = 0;
/* UART */
_Static_assert(ARRAY_SIZE(params->SerialIoUartMode) >=
ARRAY_SIZE(config->SerialIoUartMode), "copy buffer overflow!");
memcpy(params->SerialIoUartMode, config->SerialIoUartMode,
sizeof(config->SerialIoUartMode));
_Static_assert(ARRAY_SIZE(params->SerialIoUartDmaEnable) >=
ARRAY_SIZE(config->SerialIoUartDmaEnable), "copy buffer overflow!");
memcpy(params->SerialIoUartDmaEnable, config->SerialIoUartDmaEnable,
sizeof(config->SerialIoUartDmaEnable));
FSP_ARRAY_LOAD(params->SerialIoUartMode, config->SerialIoUartMode);
FSP_ARRAY_LOAD(params->SerialIoUartDmaEnable, config->SerialIoUartDmaEnable);
params->SerialIoUartCtsPinMuxPolicy[0] = 0x2B01320F; //GPIO native mode for GPP_T15
params->SerialIoUartRtsPinMuxPolicy[0] = 0x2B01220E; //GPIO native mode for GPP_T14

34
src/soc/intel/elkhartlake/romstage/fsp_params.c
View File

@@ -35,15 +35,8 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->PcieRpEnableMask = mask;
_Static_assert(ARRAY_SIZE(m_cfg->PcieClkSrcUsage) >=
ARRAY_SIZE(config->PcieClkSrcUsage), "copy buffer overflow!");
memcpy(m_cfg->PcieClkSrcUsage, config->PcieClkSrcUsage,
sizeof(config->PcieClkSrcUsage));
_Static_assert(ARRAY_SIZE(m_cfg->PcieClkSrcClkReq) >=
ARRAY_SIZE(config->PcieClkSrcClkReq), "copy buffer overflow!");
memcpy(m_cfg->PcieClkSrcClkReq, config->PcieClkSrcClkReq,
sizeof(config->PcieClkSrcClkReq));
FSP_ARRAY_LOAD(m_cfg->PcieClkSrcUsage, config->PcieClkSrcUsage);
FSP_ARRAY_LOAD(m_cfg->PcieClkSrcClkReq, config->PcieClkSrcClkReq);
m_cfg->PrmrrSize = config->PrmrrSize;
@@ -104,25 +97,10 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->PchHdaDspEnable = config->PchHdaDspEnable;
m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable;
_Static_assert(ARRAY_SIZE(m_cfg->PchHdaSdiEnable) >=
ARRAY_SIZE(config->PchHdaSdiEnable), "copy buffer overflow!");
memcpy(m_cfg->PchHdaSdiEnable, config->PchHdaSdiEnable,
sizeof(config->PchHdaSdiEnable));
_Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkDmicEnable) >=
ARRAY_SIZE(config->PchHdaAudioLinkDmicEnable), "copy buffer overflow!");
memcpy(m_cfg->PchHdaAudioLinkDmicEnable, config->PchHdaAudioLinkDmicEnable,
sizeof(config->PchHdaAudioLinkDmicEnable));
_Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkSspEnable) >=
ARRAY_SIZE(config->PchHdaAudioLinkSspEnable), "copy buffer overflow!");
memcpy(m_cfg->PchHdaAudioLinkSspEnable, config->PchHdaAudioLinkSspEnable,
sizeof(config->PchHdaAudioLinkSspEnable));
_Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkSndwEnable) >=
ARRAY_SIZE(config->PchHdaAudioLinkSndwEnable), "copy buffer overflow!");
memcpy(m_cfg->PchHdaAudioLinkSndwEnable, config->PchHdaAudioLinkSndwEnable,
sizeof(config->PchHdaAudioLinkSndwEnable));
FSP_ARRAY_LOAD(m_cfg->PchHdaSdiEnable, config->PchHdaSdiEnable);
FSP_ARRAY_LOAD(m_cfg->PchHdaAudioLinkDmicEnable, config->PchHdaAudioLinkDmicEnable);
FSP_ARRAY_LOAD(m_cfg->PchHdaAudioLinkSspEnable, config->PchHdaAudioLinkSspEnable);
FSP_ARRAY_LOAD(m_cfg->PchHdaAudioLinkSndwEnable, config->PchHdaAudioLinkSndwEnable);
/* Skip the CPU replacement check */
m_cfg->SkipCpuReplacementCheck = config->SkipCpuReplacementCheck;