soc/amd: Add definition of SPI ROM remapping

Change-Id: Icafa36ae2e07068c276600067bba1d0377f0824b
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74258
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/common/block/include/amdblocks/spi.h

@@ -70,6 +70,8 @@ enum spi100_speed {
 #define SPI100_HOST_PREF_CONFIG		0x2c
 #define   SPI_RD4DW_EN_HOST		BIT(15)
 
+#define SPI_ROM_PAGE			0x5c
+
 #define SPI_FIFO			0x80
 #define SPI_FIFO_LAST_BYTE		0xc6 /* 0xc7 for Cezanne */
 #define SPI_FIFO_DEPTH			(SPI_FIFO_LAST_BYTE - SPI_FIFO + 1)