drivers/generic/ioapic: Use arch/x86/ioapic
Change-Id: Ibfaf6693288005463e45831fe100a5052e97cf2f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55185 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
@ -9,7 +9,7 @@
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#ifndef __ACPI__
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#ifndef __ACPI__
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#include <stdint.h>
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#include <types.h>
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#define ALL (0xff << 24)
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#define ALL (0xff << 24)
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#define NONE (0)
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#define NONE (0)
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@ -31,6 +31,9 @@ void io_apic_write(void *ioapic_base, u32 reg, u32 value);
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void set_ioapic_id(void *ioapic_base, u8 ioapic_id);
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void set_ioapic_id(void *ioapic_base, u8 ioapic_id);
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void setup_ioapic(void *ioapic_base, u8 ioapic_id);
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void setup_ioapic(void *ioapic_base, u8 ioapic_id);
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void clear_ioapic(void *ioapic_base);
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void clear_ioapic(void *ioapic_base);
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void setup_ioapic_helper(void *ioapic_base, u8 ioapic_id, bool irq_on_fsb,
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bool enable_virtual_wire);
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#endif
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#endif
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#endif
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#endif
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@ -109,11 +109,14 @@ void set_ioapic_id(void *ioapic_base, u8 ioapic_id)
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}
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}
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static void load_vectors(void *ioapic_base)
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void setup_ioapic_helper(void *ioapic_base, u8 ioapic_id, bool irq_on_fsb,
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bool enable_virtual_wire)
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{
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{
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int first = 1, last;
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int first = 0, last;
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if (CONFIG(IOAPIC_INTERRUPTS_ON_FSB)) {
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set_ioapic_id(ioapic_base, ioapic_id);
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if (irq_on_fsb) {
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/*
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/*
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* For the Pentium 4 and above APICs deliver their interrupts
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* For the Pentium 4 and above APICs deliver their interrupts
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* on the front side bus, enable that.
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* on the front side bus, enable that.
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@ -121,20 +124,24 @@ static void load_vectors(void *ioapic_base)
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printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");
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printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");
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io_apic_write(ioapic_base, 0x03,
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io_apic_write(ioapic_base, 0x03,
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io_apic_read(ioapic_base, 0x03) | (1 << 0));
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io_apic_read(ioapic_base, 0x03) | (1 << 0));
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} else if (CONFIG(IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS)) {
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} else {
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printk(BIOS_DEBUG,
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printk(BIOS_DEBUG,
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"IOAPIC: Enabling interrupts on APIC serial bus\n");
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"IOAPIC: Enabling interrupts on APIC serial bus\n");
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io_apic_write(ioapic_base, 0x03, 0);
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io_apic_write(ioapic_base, 0x03, 0);
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}
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}
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route_i8259_irq0(ioapic_base);
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if (enable_virtual_wire) {
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route_i8259_irq0(ioapic_base);
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first = 1;
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}
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last = ioapic_interrupt_count(ioapic_base) - 1;
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last = ioapic_interrupt_count(ioapic_base) - 1;
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clear_vectors(ioapic_base, first, last);
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clear_vectors(ioapic_base, first, last);
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}
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}
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void setup_ioapic(void *ioapic_base, u8 ioapic_id)
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void setup_ioapic(void *ioapic_base, u8 ioapic_id)
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{
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{
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set_ioapic_id(ioapic_base, ioapic_id);
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setup_ioapic_helper(ioapic_base, ioapic_id,
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load_vectors(ioapic_base);
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CONFIG(IOAPIC_INTERRUPTS_ON_FSB), true);
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}
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}
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@ -9,76 +9,12 @@
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static void ioapic_init(struct device *dev)
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static void ioapic_init(struct device *dev)
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{
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{
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struct drivers_generic_ioapic_config *config = dev->chip_info;
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struct drivers_generic_ioapic_config *config = dev->chip_info;
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u32 bsp_lapicid = lapicid();
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u32 low, high;
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u32 i, ioapic_interrupts;
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void *ioapic_base;
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u8 ioapic_id;
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if (!dev->enabled || !config)
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if (!dev->enabled || !config)
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return;
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return;
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ioapic_base = config->base;
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setup_ioapic_helper(config->base, config->apicid, config->irq_on_fsb,
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ioapic_id = config->apicid;
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config->enable_virtual_wire);
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printk(BIOS_DEBUG, "IOAPIC: Initializing IOAPIC at %p\n",
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ioapic_base);
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printk(BIOS_DEBUG, "IOAPIC: Bootstrap Processor Local APIC = 0x%02x\n",
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bsp_lapicid);
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if (ioapic_id) {
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printk(BIOS_DEBUG, "IOAPIC: ID = 0x%02x\n", ioapic_id);
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/* Set IOAPIC ID if it has been specified. */
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io_apic_write(ioapic_base, 0x00,
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(io_apic_read(ioapic_base, 0x00) & 0xf0ffffff) |
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(ioapic_id << 24));
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}
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/* Read the available number of interrupts. */
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ioapic_interrupts = (io_apic_read(ioapic_base, 0x01) >> 16) & 0xff;
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if (!ioapic_interrupts || ioapic_interrupts == 0xff)
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ioapic_interrupts = 24;
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printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
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if (config->irq_on_fsb) {
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/*
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* For the Pentium 4 and above APICs deliver their interrupts
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* on the front side bus, enable that.
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*/
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printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on FSB\n");
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io_apic_write(ioapic_base, 0x03,
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io_apic_read(ioapic_base, 0x03) | (1 << 0));
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} else {
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printk(BIOS_DEBUG, "IOAPIC: Enabling interrupts on APIC serial bus\n");
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io_apic_write(ioapic_base, 0x03, 0);
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}
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if (config->enable_virtual_wire) {
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/* Enable Virtual Wire Mode. */
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low = INT_ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST | ExtINT;
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high = bsp_lapicid << (56 - 32);
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io_apic_write(ioapic_base, 0x10, low);
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io_apic_write(ioapic_base, 0x11, high);
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if (io_apic_read(ioapic_base, 0x10) == 0xffffffff) {
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printk(BIOS_WARNING, "IOAPIC not responding.\n");
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return;
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}
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printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n", 0,
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high, low);
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}
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low = INT_DISABLED;
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high = NONE;
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for (i = 1; i < ioapic_interrupts; i++) {
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io_apic_write(ioapic_base, i * 2 + 0x10, low);
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io_apic_write(ioapic_base, i * 2 + 0x11, high);
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printk(BIOS_SPEW, "IOAPIC: reg 0x%08x value 0x%08x 0x%08x\n",
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i, high, low);
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}
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}
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}
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static void ioapic_read_resources(struct device *dev)
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static void ioapic_read_resources(struct device *dev)
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