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soc/amd/common/psp_smi_flash: add spi_controller_available

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The SPI_SEMAPHORE_DRIVER_LOCKED bit in the SPI_MISC_CNTRL register
doesn't affect the hardware, but it re-used by AMD as a semaphore to
synchronize the access to the SPI controller between SMM and non-SMM
software like an OS-level driver. Since it doesn't affect the hardware,
it's marked as reserved in the PPRs. Add the 'spi_controller_available'
helper function to check this bit to see if some software or driver
outside of SMM is currently using the SPI flash controller to avoid
interfering with that operation.

This patch is a slightly reworked version of parts of CB:65523.

Test=When selecting SOC_AMD_COMMON_BLOCK_PSP_SMI, Mandolin still builds

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Change-Id: I49218e03a5dd555b2b2d34eaad86673e9fc908c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83775
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held
2024-08-05 23:49:47 +02:00
parent febf3e26df
commit 8cfb73c777
2 changed files with 9 additions and 0 deletions
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3
src/soc/amd/common/block/include/amdblocks/spi.h
View File

@@ -77,6 +77,9 @@ enum spi100_speed {
#define SPI_FIFO_DEPTH (SPI_FIFO_LAST_BYTE - SPI_FIFO + 1)
#define SPI_MISC_CNTRL 0xfc
/* AMD has re-purposed this unused SPI controller register bit as a semaphore to synchronize
access to the SPI controller between SMM and non-SMM software/OS driver. */
#define SPI_SEMAPHORE_DRIVER_LOCKED BIT(4)
struct spi_config {
/*

6
src/soc/amd/common/block/psp/psp_smi_flash.c
View File

@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/spi.h>
#include <boot_device.h>
#include <commonlib/region.h>
#include <console/console.h>
@@ -134,6 +135,11 @@ static inline enum mbox_p2c_status find_psp_spi_flash_device_region(u64 target_n
return MBOX_PSP_SUCCESS;
}
static inline bool spi_controller_available(void)
{
return !(spi_read8(SPI_MISC_CNTRL) & SPI_SEMAPHORE_DRIVER_LOCKED);
}
enum mbox_p2c_status psp_smi_spi_get_info(struct mbox_default_buffer *buffer)
{
struct mbox_pspv2_cmd_spi_info *const cmd_buf =