soc/amd/cezanne: Generate IVRS for cezanne

Generate IVRS for cezanne using common IVRS generation code.

BUG=b:190515051
TEST=Build cezanne coreboot image. Compare IVRS table with agesa
generated tables.

Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Change-Id: Ie15addba62ec7da25a7452512b6871e46c61b0a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Jason Glenesk
2021-07-20 05:21:54 -07:00
committed by Paul Fagerburg
parent f934fae032
commit 8d35428331
2 changed files with 10 additions and 0 deletions

View File

@@ -42,6 +42,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
select SOC_AMD_COMMON_BLOCK_ACPI_ALIB
select SOC_AMD_COMMON_BLOCK_ACPI_GPIO
select SOC_AMD_COMMON_BLOCK_ACPI_IVRS
select SOC_AMD_COMMON_BLOCK_AOAC
select SOC_AMD_COMMON_BLOCK_APOB
select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS