diff --git a/src/mainboard/system76/cml-u/devicetree.cb b/src/mainboard/system76/cml-u/devicetree.cb
index 9e511d648f..4e7f3f67a7 100644
--- a/src/mainboard/system76/cml-u/devicetree.cb
+++ b/src/mainboard/system76/cml-u/devicetree.cb
@@ -152,10 +152,10 @@ chip soc/intel/cannonlake
 	register "gen1_dec" = "0x000c0081"
 	# Address 0x88: Decode 0x68 - 0x6F (PMC)
 	register "gen2_dec" = "0x00040069"
-	# Address 0x8C: Decode 0xC00 - 0xCFF (AP/EC command)
-	register "gen3_dec" = "0x00fc0C01"
-	# Address 0x90: Decode 0xD00 - 0xDFF (AP/EC debug)
-	register "gen4_dec" = "0x00fc0D01"
+	# Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command)
+	register "gen3_dec" = "0x00fc0E01"
+	# Address 0x90: Decode 0xF00 - 0xFFF (AP/EC debug)
+	register "gen4_dec" = "0x00fc0F01"
 
 # PMC (soc/intel/cannonlake/pmc.c)
 	# Enable deep Sx states
diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb
index a42a9a09e2..53b3b13b00 100644
--- a/src/mainboard/system76/lemp9/devicetree.cb
+++ b/src/mainboard/system76/lemp9/devicetree.cb
@@ -152,10 +152,10 @@ chip soc/intel/cannonlake
 	register "gen1_dec" = "0x000c0081"
 	# Address 0x88: Decode 0x68 - 0x6F (PMC)
 	register "gen2_dec" = "0x00040069"
-	# Address 0x8C: Decode 0xC00 - 0xCFF (AP/EC command)
-	register "gen3_dec" = "0x00fc0C01"
-	# Address 0x90: Decode 0xD00 - 0xDFF (AP/EC debug)
-	register "gen4_dec" = "0x00fc0D01"
+	# Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command)
+	register "gen3_dec" = "0x00fc0E01"
+	# Address 0x90: Decode 0xF00 - 0xFFF (AP/EC debug)
+	register "gen4_dec" = "0x00fc0F01"
 
 # PMC (soc/intel/cannonlake/pmc.c)
 	# Enable deep Sx states
diff --git a/src/mainboard/system76/whl-u/devicetree.cb b/src/mainboard/system76/whl-u/devicetree.cb
index 9e511d648f..4e7f3f67a7 100644
--- a/src/mainboard/system76/whl-u/devicetree.cb
+++ b/src/mainboard/system76/whl-u/devicetree.cb
@@ -152,10 +152,10 @@ chip soc/intel/cannonlake
 	register "gen1_dec" = "0x000c0081"
 	# Address 0x88: Decode 0x68 - 0x6F (PMC)
 	register "gen2_dec" = "0x00040069"
-	# Address 0x8C: Decode 0xC00 - 0xCFF (AP/EC command)
-	register "gen3_dec" = "0x00fc0C01"
-	# Address 0x90: Decode 0xD00 - 0xDFF (AP/EC debug)
-	register "gen4_dec" = "0x00fc0D01"
+	# Address 0x8C: Decode 0xE00 - 0xEFF (AP/EC command)
+	register "gen3_dec" = "0x00fc0E01"
+	# Address 0x90: Decode 0xF00 - 0xFFF (AP/EC debug)
+	register "gen4_dec" = "0x00fc0F01"
 
 # PMC (soc/intel/cannonlake/pmc.c)
 	# Enable deep Sx states