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Fix galp5 compilation

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Change-Id: I20eec17107cf7d609a8b21fede86095a29e34db7
This commit is contained in:
Jeremy Soller
2020-10-28 12:42:38 -06:00
parent 3ace8eb089
commit 8d7bbb9369
1 changed files with 1 additions and 4 deletions
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5
src/mainboard/system76/galp5/devicetree.cb
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@@ -34,9 +34,6 @@ chip soc/intel/tigerlake
.tdp_pl2_override = 60, .tdp_pl2_override = 60,
}" }"
# Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1"
# eSPI (soc/intel/tigerlake/espi.c) # eSPI (soc/intel/tigerlake/espi.c)
# LPC configuration from lspci -s 1f.0 -xxx # LPC configuration from lspci -s 1f.0 -xxx
# Address 0x84: Decode 0x80 - 0x8F (Port 80) # Address 0x84: Decode 0x80 - 0x8F (Port 80)
@@ -231,7 +228,7 @@ chip soc/intel/tigerlake
device pci 14.0 on end # USB3.1 xHCI 0xA0ED device pci 14.0 on end # USB3.1 xHCI 0xA0ED
device pci 14.1 off end # USB3.1 xDCI 0xA0EE device pci 14.1 off end # USB3.1 xDCI 0xA0EE
device pci 14.2 on end # Shared RAM 0xA0EF device pci 14.2 on end # Shared RAM 0xA0EF
chip drivers/intel/wifi chip drivers/wifi/generic
register "wake" = "GPE0_PME_B0" register "wake" = "GPE0_PME_B0"
device pci 14.3 on end # CNVi: WiFi 0xA0F0 - A0F3 device pci 14.3 on end # CNVi: WiFi 0xA0F0 - A0F3
end end