- Minor mod to reset16.inc to work with newer binutils hopefully this works with older ones...

- Update apic.h to include the APIC_TASK_PRI register definition
- Update mptable.c to have a reasonable board OEM and productid
- Additional testfiles for romcc.
- Split out auto.c and early failover.c moving their generic bits elsewere
- Enable cache of the rom
- Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman
2003-06-17 08:42:17 +00:00
parent f96a810f11
commit 8d9c123812
17 changed files with 718 additions and 428 deletions

View File

@@ -13,7 +13,7 @@ EXT(reset_vector):
* other assemblers to tell it where the segment registers
* are pointing in memory right now.
*/
jmp EXT(_start_offset)
jmp EXT(_start)
#elif (_ROMBASE < 0x100000)
ljmp $((_ROMBASE & 0xf0000)>>4),$EXT(_start_offset);
#else

View File

@@ -46,7 +46,7 @@ set_var_mtrr:
wrmsr
#if defined(XIP_ROM_SIZE) && defined(XIP_ROM_BASE)
/* enable write back cachine so we can do execute in place
/* enable write base caching so we can do execute in place
* on the flash rom.
*/
movl $0x202, %ecx