diff --git a/src/northbridge/intel/nehalem/romstage.c b/src/northbridge/intel/nehalem/romstage.c
index 69383e6520..eceb8c2513 100644
--- a/src/northbridge/intel/nehalem/romstage.c
+++ b/src/northbridge/intel/nehalem/romstage.c
@@ -57,9 +57,6 @@ void mainboard_romstage_entry(void)
 		}
 	}
 
-	/* Enable SMBUS. */
-	enable_smbus();
-
 	early_thermal_init();
 
 	timestamp_add_now(TS_BEFORE_INITRAM);
diff --git a/src/southbridge/intel/ibexpeak/early_pch.c b/src/southbridge/intel/ibexpeak/early_pch.c
index b76115bf84..e462dd8906 100644
--- a/src/southbridge/intel/ibexpeak/early_pch.c
+++ b/src/southbridge/intel/ibexpeak/early_pch.c
@@ -44,6 +44,7 @@ static void pch_default_disable(void)
 void early_pch_init(void)
 {
 	early_gpio_init();
+	enable_smbus();
 	/* TODO, make this configurable */
 	pch_setup_cir(NEHALEM_MOBILE);
 	southbridge_configure_default_intmap();