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haswell: Add microcode for ULT C0 stepping 0x40651

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Change-Id: I53982d88f94255abdbb38ca18f9d891d4bc161b0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2858
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Duncan Laurie
2013-03-15 09:42:00 -07:00
committed by Stefan Reinauer
parent dd32a31fba
commit 8dddc30eb5
2 changed files with 962 additions and 1 deletions
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3
src/cpu/intel/haswell/microcode_blob.h
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@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Google Inc.
* Copyright 2013 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,6 +21,7 @@
#include "microcode-M32306c2_ffff0003.h"
#include "microcode-M3240660_ffff000b.h"
#include "microcode-M7240650_ffff000a.h"
#include "microcode-M7240651_00000006.h"
/* Dummy terminator */
0x0, 0x0, 0x0, 0x0,
0x0, 0x0, 0x0, 0x0,