src: Move select ARCH_X86 to platforms

To generalise the choice of 32-bit or 64-bit coreboot on x86 hardware,
have platforms select `ARCH_X86` directly instead of through per-stage
Kconfig options, effectively reversing the dependency order.

Change-Id: If15436817ba664398055e9efc6c7c656de3bf3e4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

src/cpu/intel/haswell/Kconfig

@@ -7,6 +7,7 @@ if CPU_INTEL_HASWELL
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
 	select MMX
 	select SSE2

src/cpu/intel/model_1067x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_1067X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_106cx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_106CX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_2065x/Kconfig

@@ -6,6 +6,7 @@ if CPU_INTEL_MODEL_2065X
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
 	select SSE2
 	select UDELAY_TSC

src/cpu/intel/model_206ax/Kconfig

@@ -12,6 +12,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64
 	select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64
+	select ARCH_X86
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
 	select MMX
 	select SSE2

src/cpu/intel/model_65x/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_65X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_67x/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_67X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_68x/Kconfig

@@ -3,4 +3,5 @@
 config CPU_INTEL_MODEL_68X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_6bx/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_6BX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_6ex/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6EX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_6fx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6FX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_6xx/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_6XX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_f2x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_F2X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select SMM_ASEG
 	select CPU_INTEL_COMMON

src/cpu/intel/model_f3x/Kconfig

@@ -1,5 +1,6 @@
 config CPU_INTEL_MODEL_F3X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select CPU_INTEL_COMMON

src/cpu/intel/model_f4x/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_F4X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS