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libpayload: xhci: Set MPS based on speed

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BUG=chrome-os-partner:49249
TEST=Compiles and boots and detect USB storage
BRANCH=none

Change-Id: I9007399e1f785e6f1d2258225e3f7cc602053aed
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1db43f53973d2124e41186777caa829aa346ace3
Original-Change-Id: I943d19a3a7d785bd075073b57ba6388662d7df90
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/333311
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/14659
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Varadarajan Narayanan
2016-03-17 14:43:35 +05:30
committed by Patrick Georgi
parent 9a8b67d0af
commit 8e0ffe2088
3 changed files with 16 additions and 1 deletions
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2
payloads/libpayload/drivers/usb/xhci_devconf.c
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@@ -185,7 +185,7 @@ xhci_set_address (hci_t *controller, usb_speed speed, int hubport, int hubaddr)
ic->dev.ep0->tr_dq_high = 0;
EC_SET(TYPE, ic->dev.ep0, EP_CONTROL);
EC_SET(AVRTRB, ic->dev.ep0, 8);
EC_SET(MPS, ic->dev.ep0, 8);
EC_SET(MPS, ic->dev.ep0, speed_to_default_mps(speed));
EC_SET(CERR, ic->dev.ep0, 3);
EC_SET(DCS, ic->dev.ep0, 1);