intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor

Remove cases of __PRE_RAM__ and other preprocessor guards.

Change-Id: Id295227df344fb209d7d5fd12e82aa450198bbb8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34928
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/vendorcode/intel/fsp1_0/rangeley/srx/fsphob.c

@@ -43,9 +43,7 @@ are permitted provided that the following conditions are met:
 //
 // Pointer to the HOB should be initialized with the output of FSP INIT PARAMS
 //
-#ifndef __PRE_RAM__
 extern volatile void *FspHobListPtr;
-#endif
 
 /**
   Reads a 64-bit value from memory that may be unaligned.
@@ -116,12 +114,8 @@ GetHobList (
   VOID
   )
 {
-#ifndef __PRE_RAM__
   ASSERT (FspHobListPtr != NULL);
   return ((VOID *)FspHobListPtr);
-#else
-  return ((VOID *)NULL);
-#endif
 }
 
 /**