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{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent

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Convert 0X -> 0x

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik
2020-08-30 13:51:44 +05:30
parent b7a68d5b05
commit 8e6d5f2937
51 changed files with 869 additions and 869 deletions
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2
src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Guid/AprioriFileName.h
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@@ -21,7 +21,7 @@
#define __PEI_APRIORI_FILE_NAME_H__
#define PEI_APRIORI_FILE_NAME_GUID \
{ 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0XAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } }
{ 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0xAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } }
///

2
src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/Tpm20.h
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@@ -486,7 +486,7 @@ typedef UINT16 TPM_EO;
// Table 18 - TPM_ST Constants
typedef UINT16 TPM_ST;
#define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4)
#define TPM_ST_NULL (TPM_ST)(0X8000)
#define TPM_ST_NULL (TPM_ST)(0x8000)
#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001)
#define TPM_ST_SESSIONS (TPM_ST)(0x8002)
#define TPM_ST_ATTEST_NV (TPM_ST)(0x8014)

2
src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Guid/AprioriFileName.h
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@@ -15,7 +15,7 @@
#define __PEI_APRIORI_FILE_NAME_H__
#define PEI_APRIORI_FILE_NAME_GUID \
{ 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0XAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } }
{ 0x1b45cc0a, 0x156a, 0x428a, { 0x62, 0xAF, 0x49, 0x86, 0x4d, 0xa0, 0xe6, 0xe6 } }
///

2
src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/IndustryStandard/Tpm20.h
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@@ -480,7 +480,7 @@ typedef UINT16 TPM_EO;
// Table 18 - TPM_ST Constants
typedef UINT16 TPM_ST;
#define TPM_ST_RSP_COMMAND (TPM_ST)(0x00C4)
#define TPM_ST_NULL (TPM_ST)(0X8000)
#define TPM_ST_NULL (TPM_ST)(0x8000)
#define TPM_ST_NO_SESSIONS (TPM_ST)(0x8001)
#define TPM_ST_SESSIONS (TPM_ST)(0x8002)
#define TPM_ST_ATTEST_NV (TPM_ST)(0x8014)

2
src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h
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@@ -683,7 +683,7 @@ typedef struct {
/** Offset 0x0124 - PCIe Disable Spread Spectrum Clocking
PCIe Disable Spread Spectrum Clocking. Normal Operation(0x0)(Default) - SSC enabled,
Disable SSC(0X1) - Disable SSC per platform design or for compliance testing
Disable SSC(0x1) - Disable SSC per platform design or for compliance testing
0:Normal Operation, 1:Disable SSC
**/
UINT8 PegDisableSpreadSpectrumClocking;