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google/oak: configure display

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BRANCH=none
BUG=chrome-os-partner:43706
TEST=saw bootloader screen on rev4 and rev5

Change-Id: I844fed6f63467ad04d17115934a1e4724cc0b671
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2e9d57a42402631923c96e70bc2eff5c135de2fc
Original-Change-Id: I748b0eac9a0aab1d38d5d44a1a50dc33d5375379
Original-Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/331813
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-on: https://review.coreboot.org/14690
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Jitao Shi
2016-01-11 19:24:37 +08:00
committed by Patrick Georgi
parent 4a04a7bf10
commit 8ea218b2cb
3 changed files with 45 additions and 2 deletions
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43
src/mainboard/google/oak/mainboard.c
View File

@@ -152,6 +152,48 @@ static void configure_backlight(void)
gpio_output(PAD_PCM_TX, 0); /* PANEL_POWER_EN */
}
static void configure_display(void)
{
mtcmos_display_power_on();
switch (board_id()) {
case 0:
/* board from Rev0, Rev1 */
/* vgp2 set to 1.8V for it6151 */
mt6391_configure_ldo(LDO_VGP2, LDO_1P8);
gpio_output(PAD_PCM_RX, 0); /* IT6151_SYSRSTN */
gpio_output(PAD_CMMCLK, 1); /* PANEL_3V3_ENABLE */
gpio_output(PAD_PCM_SYNC, 1); /* IT6151_1V2_ENABLE */
gpio_output(PAD_PCM_RX, 1); /* IT6151_SYSRSTN */
break;
case 1:
/* board from Rev0, Rev1 */
/* vgp2 set to 1.8V for it6151 */
mt6391_configure_ldo(LDO_VGP2, LDO_1P8);
gpio_output(PAD_URTS0, 0); /* IT6151_SYSRSTN */
gpio_output(PAD_URTS2, 1); /* IT6151_1V2_ENABLE */
gpio_output(PAD_CMMCLK, 1); /* PANEL_3V3_ENABLE */
gpio_output(PAD_URTS0, 1); /* IT6151_SYSRSTN */
break;
default:
/* board from Rev2 */
gpio_output(PAD_CMMCLK, 1); /* PANEL_3V3_ENABLE */
/* vgp2 set to 3.3V for ps8640 */
mt6391_configure_ldo(LDO_VGP2, LDO_3P3);
gpio_output(PAD_URTS0, 0); /* PS8640_SYSRSTN */
/* PS8640_1V2_ENABLE */
gpio_output(board_id() == 4 ? PAD_SRCLKENAI2 : PAD_URTS2, 1);
/* delay 2ms for vgp2 and PS8640_1V2_ENABLE stable */
mdelay(2);
/* PS8640_PDN */
gpio_output(board_id() > 4 ? PAD_LCM_RST : PAD_UCTS0, 1);
gpio_output(PAD_PCM_CLK, 1); /* PS8640_MODE_CONF */
gpio_output(PAD_URTS0, 1); /* PS8640_SYSRSTN */
/* for level shift(1.8V to 3.3V) on */
udelay(100);
}
}
static void display_startup(void)
{
struct edid edid;
@@ -207,6 +249,7 @@ static void mainboard_init(device_t dev)
configure_audio();
if (display_init_required()) {
configure_backlight();
configure_display();
display_startup();
} else {
printk(BIOS_INFO, "Skipping display init.\n");

2
src/soc/mediatek/mt8173/include/soc/mt6391.h
View File

@@ -264,7 +264,7 @@ enum{
enum ldo_power {
LDO_VCAMD = 0, /* VGP1 */
LDO_VCAMIO = 1, /* VGP2 */
LDO_VGP2 = 1, /* VGP2 */
LDO_VCAMAF = 2, /* VGP3 */
LDO_VGP4 = 3,
LDO_VGP5 = 4,

2
src/soc/mediatek/mt8173/mt6391.c
View File

@@ -98,7 +98,7 @@ void mt6391_configure_ldo(enum ldo_power ldo, enum ldo_voltage vsel)
if (vsel == LDO_1P22)
vsel = 0;
break;
case LDO_VCAMIO:
case LDO_VGP2:
assert(vsel != 1);
if (vsel == LDO_1P0)
vsel = 1;