Documentation: Fix a bunch of typos
Change-Id: I25dca2e231343cfdad61a638f0302726a6aa3f8b Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/25571 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@@ -966,7 +966,7 @@ Please handle with care !
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*Width:* 24 Bit
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*Desc:* TC_DBP - Timming of DDR - Bin Parameter Register, Channel 0
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*Desc:* TC_DBP - Timing of DDR - Bin Parameter Register, Channel 0
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|Bit| Description |
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