From 8f1a8f2a817d0ca84a4616d83b43ab4c4c8141be Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Thu, 21 Jul 2022 12:07:45 -0600 Subject: [PATCH] mb/system76/gaze17: 3050: Hack around WD drive issue The WD drives fail to go from D3cold to D0. Disabling L23 on the PCH port allows it to work. Disabling L23 on the CPU port causes the CPU to not reach C10 during suspend, so just remove the entire RTD3 config. Change-Id: I3bf27fb0fe98e5ec05bff9cc18ab2dd8ac6c66b3 Signed-off-by: Tim Crawford --- .../gaze17/variants/3050/overridetree.cb | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/src/mainboard/system76/gaze17/variants/3050/overridetree.cb b/src/mainboard/system76/gaze17/variants/3050/overridetree.cb index 86ea246c88..94b03cdb02 100644 --- a/src/mainboard/system76/gaze17/variants/3050/overridetree.cb +++ b/src/mainboard/system76/gaze17/variants/3050/overridetree.cb @@ -17,13 +17,15 @@ chip soc/intel/alderlake .clk_req = 0, .flags = PCIE_RP_LTR, }" - chip soc/intel/common/block/pcie/rtd3 - # XXX: Enable tied to 3.3VS? - #register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SATA_M2_PWR_EN2 - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# - register "srcclk_pin" = "0" # SSD0_CLKREQ# - device generic 0 on end - end + #chip soc/intel/common/block/pcie/rtd3 + # # XXX: Enable tied to 3.3VS? + # #register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SATA_M2_PWR_EN2 + # register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# + # register "reset_delay_ms" = "100" + # register "reset_off_delay_ms" = "100" + # register "srcclk_pin" = "0" # SSD0_CLKREQ# + # device generic 0 on end + #end end device ref xhci on # USB2 @@ -51,6 +53,7 @@ chip soc/intel/alderlake # XXX: Enable tied to 3.3VS? #register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # M2_PWR_EN1 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B13)" # BUF_PLT_RST# + register "disable_l23" = "true" register "srcclk_pin" = "1" # SSD1_CLKREQ# device generic 0 on end end