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soc/intel: Add Intel Xeon Scalable Processor support

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This patch adds support for Intel Xeon-SP.

This patch is developed and verified with Skylake Scalable
Processor, which is a processor in Xeon-SP family. The code
is expected to be reusable for future geneations of Xeon-SP
processors, and will be updated with smaller targeted
patches accordingly, to add support for additional Xeon-SP
processors, to add features, and to improve the code base.

The Skylake-SP FSP is based on FSP 2.0. The FSP is a
proof-of-concept build. The binary is not shared in public,
when this patch is upstreamed.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com>
Tested-by: johnny_lin@wiwynn.com
Change-Id: Idc9c3bee17caf8b4841f0bc190cb1aa9d38fc23e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Jonathan Zhang
2020-01-16 11:16:45 -08:00
committed by Patrick Georgi
parent e425a09d6a
commit 8f89549d3c
36 changed files with 5497 additions and 1 deletions
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2
src/drivers/intel/fsp2_0/Kconfig
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@@ -56,7 +56,7 @@ config FSP_USE_REPO
depends on SOC_INTEL_APOLLOLAKE || SOC_INTEL_SKYLAKE || \
SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE || \
SOC_INTEL_ICELAKE || SOC_INTEL_WHISKEYLAKE || \
SOC_INTEL_DENVERTON_NS
SOC_INTEL_DENVERTON_NS || SOC_INTEL_XEON_SP
help
When selecting this option, the SoC must set FSP_HEADER_PATH
and FSP_FD_PATH correctly so FSP splitting works.