ARMv7/Exynos: Fix memory location assumptions
This patch cleans out a lot of unused variables in the ARM Kconfig files and introduces CONFIG_RAMSTAGE_BASE which is similar to CONFIG_RAMBASE on x86. This gets rid of the hard coded assumption that on ARM coreboot is always executed at the lowest DRAM address. But in fact, this might not be true because we might want coreboot to live at the end of RAM, or in SRAM Change-Id: I03e992645f9eb730e39a521aa21f702959311f74 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: https://chromium-review.googlesource.com/168645 Reviewed-by: David Hendrix <dhendrix@chromium.org> Tested-by: David Hendrix <dhendrix@chromium.org> (cherry picked from commit 15b87892eb2d5e27759c49dc6c8c7e626f651d77) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6634 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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committed by
Isaac Christensen
parent
fa938c7508
commit
8f993784ef
@@ -33,7 +33,7 @@ config MAINBOARD_DIR
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config MAINBOARD_PART_NUMBER
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string
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default "QEMU ARMV7"
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default "QEMU ARMv7"
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config MAX_CPUS
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int
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@@ -43,6 +43,10 @@ config MAINBOARD_VENDOR
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string
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default "ARM Ltd."
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config SYS_SDRAM_BASE
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hex "SDRAM base address"
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default 0x01000000
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config DRAM_SIZE_MB
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int
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default 1024
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@@ -62,17 +66,13 @@ config BOOTBLOCK_BASE
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hex
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default 0x00010000
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config ID_SECTION_BASE
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hex
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default 0x0001f000
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config ROMSTAGE_BASE
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hex
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default 0x00020000
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config ROMSTAGE_SIZE
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config RAMSTAGE_BASE
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hex
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default 0x20000
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default SYS_SDRAM_BASE
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config BOOTBLOCK_ROM_OFFSET
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hex
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@@ -98,8 +98,4 @@ config STACK_SIZE
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hex
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default 0x0003ff00
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config SYS_SDRAM_BASE
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hex "SDRAM base address"
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default 0x01000000
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endif # BOARD_EMULATION_QEMU_ARMV7
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