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libpayload: Remove bitfield use from EHCI data structures

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We agreed that bitfields are a Bad Idea[tm].

Change-Id: If4c4cb748af340e2721b89fea8e035da0632971f
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/480
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
This commit is contained in:
Patrick Georgi
2011-11-24 13:19:57 +01:00
committed by Peter Stuge
parent b0b4a52b70
commit 8fa2787a0d
3 changed files with 139 additions and 295 deletions
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144
payloads/libpayload/drivers/usb/ehci.c
View File

@ -34,19 +34,19 @@
static void dump_td(u32 addr)
{
qtd_t *td = phys_to_virt(addr);
debug("td at phys(%x): active: %x, halted: %x, data_buf_err: %x\n babble: %x, xact_err: %x, missed_mframe: %x\n splitxstate: %x, perr: %x\n\n",
addr, td->active, td->halted, td->data_buf_err, td->babble, td->xact_err, td->missed_mframe, td->splitxstate, td->perr);
debug("- cerr: %x, total_len: %x\n\n", td->cerr, td->total_len);
debug("td at phys(%x): status: %x\n\n", addr, td->token & QTD_STATUS_MASK);
debug("- cerr: %x, total_len: %x\n\n", (td->token & QTD_CERR_MASK) >> QTD_CERR_SHIFT,
(td->token & QTD_TOTAL_LEN_MASK) >> QTD_TOTAL_LEN_SHIFT);
}
static void ehci_start (hci_t *controller)
{
EHCI_INST(controller)->operation->rs = 1;
EHCI_INST(controller)->operation->usbcmd |= HC_OP_RS;
}
static void ehci_stop (hci_t *controller)
{
EHCI_INST(controller)->operation->rs = 0;
EHCI_INST(controller)->operation->usbcmd &= ~HC_OP_RS;
}
static void ehci_reset (hci_t *controller)
@ -61,20 +61,19 @@ static void ehci_shutdown (hci_t *controller)
enum { EHCI_OUT=0, EHCI_IN=1, EHCI_SETUP=2 };
/* returns handled bytes */
int fill_td(qtd_t *td, void* data, int datalen)
/* returns handled bytes. assumes that the fields it writes are empty on entry */
static int fill_td(qtd_t *td, void* data, int datalen)
{
u32 total_len = 0;
u32 page_minus_1 = 0;
u32 page_no = 0;
u32 start = virt_to_phys(data);
u32 page = start & ~4095;
u32 offset = start & 4095;
u32 page_len = 4096 - offset;
td->c_page = 0;
td->bufptr0 = page;
td->cur_off = offset;
td->token |= 0 << QTD_CPAGE_SHIFT;
td->bufptrs[page_no++] = start;
if (datalen <= page_len) {
total_len = datalen;
@ -82,26 +81,25 @@ int fill_td(qtd_t *td, void* data, int datalen)
datalen -= page_len;
total_len += page_len;
do {
while (page_no < 5) {
/* we have a continguous mapping between virtual and physical memory */
page += 4096;
td->bufptrs[page_minus_1] = page;
td->bufptrs[page_no++] = page;
if (datalen <= 4096) {
total_len += datalen;
break;
}
page_minus_1++;
datalen -= 4096;
total_len += 4096;
} while (page_minus_1<4);
}
}
td->total_len = total_len;
td->token |= total_len << QTD_TOTAL_LEN_SHIFT;
return total_len;
}
/* free up data structures */
void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur)
static void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur)
{
qtd_t *next;
while (cur) {
@ -112,14 +110,14 @@ void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur)
free(qh);
}
int wait_for_tds(qtd_t *head)
static int wait_for_tds(qtd_t *head)
{
int result = 0;
qtd_t *cur = head;
while (1) {
if (0) dump_td(virt_to_phys(cur));
while (cur->active && !cur->halted) udelay(60);
if (cur->halted) {
while ((cur->token & QTD_ACTIVE) && !(cur->token & QTD_HALTED)) udelay(60);
if (cur->token & QTD_HALTED) {
printf("ERROR with packet\n");
dump_td(virt_to_phys(cur));
debug("-----------------\n");
@ -146,17 +144,16 @@ static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
qtd_t *cur = head;
while (1) {
memset(cur, 0, sizeof(qtd_t));
cur->active = 1;
cur->pid = pid;
cur->cerr = 0;
cur->token = QTD_ACTIVE |
(pid << QTD_PID_SHIFT) |
(0 << QTD_CERR_SHIFT);
u32 chunk = fill_td(cur, data, size);
size -= chunk;
data += chunk;
cur->alt_terminate = 1;
cur->alt_next_qtd = QTD_TERMINATE;
if (size == 0) {
cur->next_qtd = virt_to_phys(0);
cur->terminate = 1;
cur->next_qtd = virt_to_phys(0) | QTD_TERMINATE;
break;
} else {
qtd_t *next = memalign(32, sizeof(qtd_t));
@ -168,36 +165,35 @@ static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
/* create QH */
ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
memset(qh, 0, sizeof(ehci_qh_t));
qh->horiz_link_ptr = virt_to_phys(qh);
qh->type = 1; // FIXME: proper symbols for type. this is QH
qh->addr = ep->dev->address;
qh->ep = endp;
qh->eps = ep->dev->speed;
qh->dtc = 0;
qh->reclaim_head = 1;
qh->max_packet_len = ep->maxpacketsize;
qh->nak_cnt_reload = 0;
qh->pipe_multiplier = 3;
qh->horiz_link_ptr = virt_to_phys(qh) | QH_QH;
qh->epchar = ep->dev->address |
(endp << QH_EP_SHIFT) |
(ep->dev->speed << QH_EPS_SHIFT) |
(0 << QH_DTC_SHIFT) |
(1 << QH_RECLAIM_HEAD_SHIFT) |
(ep->maxpacketsize << QH_MPS_SHIFT) |
(0 << QH_NAK_CNT_SHIFT);
qh->epcaps = 3 << QH_PIPE_MULTIPLIER_SHIFT;
qh->td.next_qtd = virt_to_phys(head);
qh->td.dt = ep->toggle;
head->dt = ep->toggle;
qh->td.token |= (ep->toggle?QTD_TOGGLE_DATA1:0);
head->token |= (ep->toggle?QTD_TOGGLE_DATA1:0);
/* hook up QH */
EHCI_INST(ep->dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
/* start async schedule */
EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 1;
while (!EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */
EHCI_INST(ep->dev->controller)->operation->usbcmd |= HC_OP_ASYNC_SCHED_EN;
while (!(EHCI_INST(ep->dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT)) ; /* wait */
/* wait for result */
result = wait_for_tds(head);
/* disable async schedule */
EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 0;
while (EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */
EHCI_INST(ep->dev->controller)->operation->usbcmd &= ~HC_OP_ASYNC_SCHED_EN;
while (EHCI_INST(ep->dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT) ; /* wait */
ep->toggle = cur->dt;
ep->toggle = (cur->token & QTD_TOGGLE_MASK) >> QTD_TOGGLE_SHIFT;
free_qh_and_tds(qh, head);
return result;
@ -217,16 +213,16 @@ static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq
qtd_t *head = memalign(32, sizeof(qtd_t));
qtd_t *cur = head;
memset(cur, 0, sizeof(qtd_t));
cur->active = 1;
cur->dt = toggle;
cur->pid = EHCI_SETUP;
cur->cerr = 3;
cur->token = QTD_ACTIVE |
(toggle?QTD_TOGGLE_DATA1:0) |
(EHCI_SETUP << QTD_PID_SHIFT) |
(3 << QTD_CERR_SHIFT);
if (fill_td(cur, devreq, drlen) != drlen) {
printf("ERROR: couldn't send the entire device request\n");
}
qtd_t *next = memalign(32, sizeof(qtd_t));
cur->next_qtd = virt_to_phys(next);
cur->alt_terminate = 1;
cur->alt_next_qtd = QTD_TERMINATE;
/* FIXME: We're limited to 16-20K (depending on alignment) for payload for now.
* Figure out, how toggle can be set sensibly in this scenario */
@ -234,58 +230,56 @@ static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq
toggle ^= 1;
cur = next;
memset(cur, 0, sizeof(qtd_t));
cur->active = 1;
cur->dt = toggle;
cur->pid = (dir == OUT)?EHCI_OUT:EHCI_IN;
cur->cerr = 3;
cur->token = QTD_ACTIVE |
(toggle?QTD_TOGGLE_DATA1:0) |
(((dir == OUT)?EHCI_OUT:EHCI_IN) << QTD_PID_SHIFT) |
(3 << QTD_CERR_SHIFT);
if (fill_td(cur, data, dalen) != dalen) {
printf("ERROR: couldn't send the entire control payload\n");
}
next = memalign(32, sizeof(qtd_t));
cur->next_qtd = virt_to_phys(next);
cur->alt_terminate = 1;
cur->alt_next_qtd = QTD_TERMINATE;
}
toggle = 1;
cur = next;
memset(cur, 0, sizeof(qtd_t));
cur->active = 1;
cur->dt = toggle;
cur->pid = (dir == OUT)?EHCI_IN:EHCI_OUT;
cur->cerr = 0;
cur->token = QTD_ACTIVE |
(toggle?QTD_TOGGLE_DATA1:QTD_TOGGLE_DATA0) |
((dir == OUT)?EHCI_IN:EHCI_OUT) << QTD_PID_SHIFT |
(0 << QTD_CERR_SHIFT);
fill_td(cur, NULL, 0);
cur->next_qtd = virt_to_phys(0);
cur->terminate = 1;
cur->alt_terminate = 1;
cur->next_qtd = virt_to_phys(0) | QTD_TERMINATE;
cur->alt_next_qtd = QTD_TERMINATE;
/* create QH */
ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
memset(qh, 0, sizeof(ehci_qh_t));
qh->horiz_link_ptr = virt_to_phys(qh);
qh->type = 1; // FIXME: proper symbols for type. this is QH
qh->addr = dev->address;
qh->ep = endp;
qh->eps = dev->speed;
qh->dtc = 1; /* Take data toggle from TD, as control transfers are special */
qh->reclaim_head = 1;
qh->max_packet_len = mlen;
qh->non_hs_control_ep = 0; // no support for non-HS devices at this time
qh->nak_cnt_reload = 0;
qh->pipe_multiplier = 3;
qh->horiz_link_ptr = virt_to_phys(qh) | QH_QH;
qh->epchar = dev->address |
(endp << QH_EP_SHIFT) |
(dev->speed << QH_EPS_SHIFT) |
(1 << QH_DTC_SHIFT) | /* ctrl transfers are special: take toggle bit from TD */
(1 << QH_RECLAIM_HEAD_SHIFT) |
(mlen << QH_MPS_SHIFT) |
(0 << QH_NON_HS_CTRL_EP_SHIFT) | /* no non-HS device support yet */
(0 << QH_NAK_CNT_SHIFT);
qh->epcaps = 3 << QH_PIPE_MULTIPLIER_SHIFT;
qh->td.next_qtd = virt_to_phys(head);
/* hook up QH */
EHCI_INST(dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
/* start async schedule */
EHCI_INST(dev->controller)->operation->async_sched_enable = 1;
while (!EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */
EHCI_INST(dev->controller)->operation->usbcmd |= HC_OP_ASYNC_SCHED_EN;
while (!(EHCI_INST(dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT)) ; /* wait */
result = wait_for_tds(head);
/* disable async schedule */
EHCI_INST(dev->controller)->operation->async_sched_enable = 0;
while (EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */
EHCI_INST(dev->controller)->operation->usbcmd &= ~HC_OP_ASYNC_SCHED_EN;
while (EHCI_INST(dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT) ; /* wait */
free_qh_and_tds(qh, head);
return result;