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libpayload: Remove bitfield use from EHCI data structures

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We agreed that bitfields are a Bad Idea[tm].

Change-Id: If4c4cb748af340e2721b89fea8e035da0632971f
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/480
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
This commit is contained in:
Patrick Georgi
2011-11-24 13:19:57 +01:00
committed by Peter Stuge
parent b0b4a52b70
commit 8fa2787a0d
3 changed files with 139 additions and 295 deletions
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144
payloads/libpayload/drivers/usb/ehci.c
View File

@ -34,19 +34,19 @@
static void dump_td(u32 addr) static void dump_td(u32 addr)
{ {
qtd_t *td = phys_to_virt(addr); qtd_t *td = phys_to_virt(addr);
debug("td at phys(%x): active: %x, halted: %x, data_buf_err: %x\n babble: %x, xact_err: %x, missed_mframe: %x\n splitxstate: %x, perr: %x\n\n", debug("td at phys(%x): status: %x\n\n", addr, td->token & QTD_STATUS_MASK);
addr, td->active, td->halted, td->data_buf_err, td->babble, td->xact_err, td->missed_mframe, td->splitxstate, td->perr); debug("- cerr: %x, total_len: %x\n\n", (td->token & QTD_CERR_MASK) >> QTD_CERR_SHIFT,
debug("- cerr: %x, total_len: %x\n\n", td->cerr, td->total_len); (td->token & QTD_TOTAL_LEN_MASK) >> QTD_TOTAL_LEN_SHIFT);
} }
static void ehci_start (hci_t *controller) static void ehci_start (hci_t *controller)
{ {
EHCI_INST(controller)->operation->rs = 1; EHCI_INST(controller)->operation->usbcmd |= HC_OP_RS;
} }
static void ehci_stop (hci_t *controller) static void ehci_stop (hci_t *controller)
{ {
EHCI_INST(controller)->operation->rs = 0; EHCI_INST(controller)->operation->usbcmd &= ~HC_OP_RS;
} }
static void ehci_reset (hci_t *controller) static void ehci_reset (hci_t *controller)
@ -61,20 +61,19 @@ static void ehci_shutdown (hci_t *controller)
enum { EHCI_OUT=0, EHCI_IN=1, EHCI_SETUP=2 }; enum { EHCI_OUT=0, EHCI_IN=1, EHCI_SETUP=2 };
/* returns handled bytes */ /* returns handled bytes. assumes that the fields it writes are empty on entry */
int fill_td(qtd_t *td, void* data, int datalen) static int fill_td(qtd_t *td, void* data, int datalen)
{ {
u32 total_len = 0; u32 total_len = 0;
u32 page_minus_1 = 0; u32 page_no = 0;
u32 start = virt_to_phys(data); u32 start = virt_to_phys(data);
u32 page = start & ~4095; u32 page = start & ~4095;
u32 offset = start & 4095; u32 offset = start & 4095;
u32 page_len = 4096 - offset; u32 page_len = 4096 - offset;
td->c_page = 0; td->token |= 0 << QTD_CPAGE_SHIFT;
td->bufptr0 = page; td->bufptrs[page_no++] = start;
td->cur_off = offset;
if (datalen <= page_len) { if (datalen <= page_len) {
total_len = datalen; total_len = datalen;
@ -82,26 +81,25 @@ int fill_td(qtd_t *td, void* data, int datalen)
datalen -= page_len; datalen -= page_len;
total_len += page_len; total_len += page_len;
do { while (page_no < 5) {
/* we have a continguous mapping between virtual and physical memory */ /* we have a continguous mapping between virtual and physical memory */
page += 4096; page += 4096;
td->bufptrs[page_minus_1] = page; td->bufptrs[page_no++] = page;
if (datalen <= 4096) { if (datalen <= 4096) {
total_len += datalen; total_len += datalen;
break; break;
} }
page_minus_1++;
datalen -= 4096; datalen -= 4096;
total_len += 4096; total_len += 4096;
} while (page_minus_1<4);
} }
td->total_len = total_len; }
td->token |= total_len << QTD_TOTAL_LEN_SHIFT;
return total_len; return total_len;
} }
/* free up data structures */ /* free up data structures */
void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur) static void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur)
{ {
qtd_t *next; qtd_t *next;
while (cur) { while (cur) {
@ -112,14 +110,14 @@ void free_qh_and_tds(ehci_qh_t *qh, qtd_t *cur)
free(qh); free(qh);
} }
int wait_for_tds(qtd_t *head) static int wait_for_tds(qtd_t *head)
{ {
int result = 0; int result = 0;
qtd_t *cur = head; qtd_t *cur = head;
while (1) { while (1) {
if (0) dump_td(virt_to_phys(cur)); if (0) dump_td(virt_to_phys(cur));
while (cur->active && !cur->halted) udelay(60); while ((cur->token & QTD_ACTIVE) && !(cur->token & QTD_HALTED)) udelay(60);
if (cur->halted) { if (cur->token & QTD_HALTED) {
printf("ERROR with packet\n"); printf("ERROR with packet\n");
dump_td(virt_to_phys(cur)); dump_td(virt_to_phys(cur));
debug("-----------------\n"); debug("-----------------\n");
@ -146,17 +144,16 @@ static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
qtd_t *cur = head; qtd_t *cur = head;
while (1) { while (1) {
memset(cur, 0, sizeof(qtd_t)); memset(cur, 0, sizeof(qtd_t));
cur->active = 1; cur->token = QTD_ACTIVE |
cur->pid = pid; (pid << QTD_PID_SHIFT) |
cur->cerr = 0; (0 << QTD_CERR_SHIFT);
u32 chunk = fill_td(cur, data, size); u32 chunk = fill_td(cur, data, size);
size -= chunk; size -= chunk;
data += chunk; data += chunk;
cur->alt_terminate = 1; cur->alt_next_qtd = QTD_TERMINATE;
if (size == 0) { if (size == 0) {
cur->next_qtd = virt_to_phys(0); cur->next_qtd = virt_to_phys(0) | QTD_TERMINATE;
cur->terminate = 1;
break; break;
} else { } else {
qtd_t *next = memalign(32, sizeof(qtd_t)); qtd_t *next = memalign(32, sizeof(qtd_t));
@ -168,36 +165,35 @@ static int ehci_bulk (endpoint_t *ep, int size, u8 *data, int finalize)
/* create QH */ /* create QH */
ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t)); ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
memset(qh, 0, sizeof(ehci_qh_t)); memset(qh, 0, sizeof(ehci_qh_t));
qh->horiz_link_ptr = virt_to_phys(qh); qh->horiz_link_ptr = virt_to_phys(qh) | QH_QH;
qh->type = 1; // FIXME: proper symbols for type. this is QH qh->epchar = ep->dev->address |
qh->addr = ep->dev->address; (endp << QH_EP_SHIFT) |
qh->ep = endp; (ep->dev->speed << QH_EPS_SHIFT) |
qh->eps = ep->dev->speed; (0 << QH_DTC_SHIFT) |
qh->dtc = 0; (1 << QH_RECLAIM_HEAD_SHIFT) |
qh->reclaim_head = 1; (ep->maxpacketsize << QH_MPS_SHIFT) |
qh->max_packet_len = ep->maxpacketsize; (0 << QH_NAK_CNT_SHIFT);
qh->nak_cnt_reload = 0; qh->epcaps = 3 << QH_PIPE_MULTIPLIER_SHIFT;
qh->pipe_multiplier = 3;
qh->td.next_qtd = virt_to_phys(head); qh->td.next_qtd = virt_to_phys(head);
qh->td.dt = ep->toggle; qh->td.token |= (ep->toggle?QTD_TOGGLE_DATA1:0);
head->dt = ep->toggle; head->token |= (ep->toggle?QTD_TOGGLE_DATA1:0);
/* hook up QH */ /* hook up QH */
EHCI_INST(ep->dev->controller)->operation->asynclistaddr = virt_to_phys(qh); EHCI_INST(ep->dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
/* start async schedule */ /* start async schedule */
EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 1; EHCI_INST(ep->dev->controller)->operation->usbcmd |= HC_OP_ASYNC_SCHED_EN;
while (!EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */ while (!(EHCI_INST(ep->dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT)) ; /* wait */
/* wait for result */ /* wait for result */
result = wait_for_tds(head); result = wait_for_tds(head);
/* disable async schedule */ /* disable async schedule */
EHCI_INST(ep->dev->controller)->operation->async_sched_enable = 0; EHCI_INST(ep->dev->controller)->operation->usbcmd &= ~HC_OP_ASYNC_SCHED_EN;
while (EHCI_INST(ep->dev->controller)->operation->async_sched_status) ; /* wait */ while (EHCI_INST(ep->dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT) ; /* wait */
ep->toggle = cur->dt; ep->toggle = (cur->token & QTD_TOGGLE_MASK) >> QTD_TOGGLE_SHIFT;
free_qh_and_tds(qh, head); free_qh_and_tds(qh, head);
return result; return result;
@ -217,16 +213,16 @@ static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq
qtd_t *head = memalign(32, sizeof(qtd_t)); qtd_t *head = memalign(32, sizeof(qtd_t));
qtd_t *cur = head; qtd_t *cur = head;
memset(cur, 0, sizeof(qtd_t)); memset(cur, 0, sizeof(qtd_t));
cur->active = 1; cur->token = QTD_ACTIVE |
cur->dt = toggle; (toggle?QTD_TOGGLE_DATA1:0) |
cur->pid = EHCI_SETUP; (EHCI_SETUP << QTD_PID_SHIFT) |
cur->cerr = 3; (3 << QTD_CERR_SHIFT);
if (fill_td(cur, devreq, drlen) != drlen) { if (fill_td(cur, devreq, drlen) != drlen) {
printf("ERROR: couldn't send the entire device request\n"); printf("ERROR: couldn't send the entire device request\n");
} }
qtd_t *next = memalign(32, sizeof(qtd_t)); qtd_t *next = memalign(32, sizeof(qtd_t));
cur->next_qtd = virt_to_phys(next); cur->next_qtd = virt_to_phys(next);
cur->alt_terminate = 1; cur->alt_next_qtd = QTD_TERMINATE;
/* FIXME: We're limited to 16-20K (depending on alignment) for payload for now. /* FIXME: We're limited to 16-20K (depending on alignment) for payload for now.
* Figure out, how toggle can be set sensibly in this scenario */ * Figure out, how toggle can be set sensibly in this scenario */
@ -234,58 +230,56 @@ static int ehci_control (usbdev_t *dev, direction_t dir, int drlen, void *devreq
toggle ^= 1; toggle ^= 1;
cur = next; cur = next;
memset(cur, 0, sizeof(qtd_t)); memset(cur, 0, sizeof(qtd_t));
cur->active = 1; cur->token = QTD_ACTIVE |
cur->dt = toggle; (toggle?QTD_TOGGLE_DATA1:0) |
cur->pid = (dir == OUT)?EHCI_OUT:EHCI_IN; (((dir == OUT)?EHCI_OUT:EHCI_IN) << QTD_PID_SHIFT) |
cur->cerr = 3; (3 << QTD_CERR_SHIFT);
if (fill_td(cur, data, dalen) != dalen) { if (fill_td(cur, data, dalen) != dalen) {
printf("ERROR: couldn't send the entire control payload\n"); printf("ERROR: couldn't send the entire control payload\n");
} }
next = memalign(32, sizeof(qtd_t)); next = memalign(32, sizeof(qtd_t));
cur->next_qtd = virt_to_phys(next); cur->next_qtd = virt_to_phys(next);
cur->alt_terminate = 1; cur->alt_next_qtd = QTD_TERMINATE;
} }
toggle = 1; toggle = 1;
cur = next; cur = next;
memset(cur, 0, sizeof(qtd_t)); memset(cur, 0, sizeof(qtd_t));
cur->active = 1; cur->token = QTD_ACTIVE |
cur->dt = toggle; (toggle?QTD_TOGGLE_DATA1:QTD_TOGGLE_DATA0) |
cur->pid = (dir == OUT)?EHCI_IN:EHCI_OUT; ((dir == OUT)?EHCI_IN:EHCI_OUT) << QTD_PID_SHIFT |
cur->cerr = 0; (0 << QTD_CERR_SHIFT);
fill_td(cur, NULL, 0); fill_td(cur, NULL, 0);
cur->next_qtd = virt_to_phys(0); cur->next_qtd = virt_to_phys(0) | QTD_TERMINATE;
cur->terminate = 1; cur->alt_next_qtd = QTD_TERMINATE;
cur->alt_terminate = 1;
/* create QH */ /* create QH */
ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t)); ehci_qh_t *qh = memalign(32, sizeof(ehci_qh_t));
memset(qh, 0, sizeof(ehci_qh_t)); memset(qh, 0, sizeof(ehci_qh_t));
qh->horiz_link_ptr = virt_to_phys(qh); qh->horiz_link_ptr = virt_to_phys(qh) | QH_QH;
qh->type = 1; // FIXME: proper symbols for type. this is QH qh->epchar = dev->address |
qh->addr = dev->address; (endp << QH_EP_SHIFT) |
qh->ep = endp; (dev->speed << QH_EPS_SHIFT) |
qh->eps = dev->speed; (1 << QH_DTC_SHIFT) | /* ctrl transfers are special: take toggle bit from TD */
qh->dtc = 1; /* Take data toggle from TD, as control transfers are special */ (1 << QH_RECLAIM_HEAD_SHIFT) |
qh->reclaim_head = 1; (mlen << QH_MPS_SHIFT) |
qh->max_packet_len = mlen; (0 << QH_NON_HS_CTRL_EP_SHIFT) | /* no non-HS device support yet */
qh->non_hs_control_ep = 0; // no support for non-HS devices at this time (0 << QH_NAK_CNT_SHIFT);
qh->nak_cnt_reload = 0; qh->epcaps = 3 << QH_PIPE_MULTIPLIER_SHIFT;
qh->pipe_multiplier = 3;
qh->td.next_qtd = virt_to_phys(head); qh->td.next_qtd = virt_to_phys(head);
/* hook up QH */ /* hook up QH */
EHCI_INST(dev->controller)->operation->asynclistaddr = virt_to_phys(qh); EHCI_INST(dev->controller)->operation->asynclistaddr = virt_to_phys(qh);
/* start async schedule */ /* start async schedule */
EHCI_INST(dev->controller)->operation->async_sched_enable = 1; EHCI_INST(dev->controller)->operation->usbcmd |= HC_OP_ASYNC_SCHED_EN;
while (!EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */ while (!(EHCI_INST(dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT)) ; /* wait */
result = wait_for_tds(head); result = wait_for_tds(head);
/* disable async schedule */ /* disable async schedule */
EHCI_INST(dev->controller)->operation->async_sched_enable = 0; EHCI_INST(dev->controller)->operation->usbcmd &= ~HC_OP_ASYNC_SCHED_EN;
while (EHCI_INST(dev->controller)->operation->async_sched_status) ; /* wait */ while (EHCI_INST(dev->controller)->operation->usbsts & HC_OP_ASYNC_SCHED_STAT) ; /* wait */
free_qh_and_tds(qh, head); free_qh_and_tds(qh, head);
return result; return result;

231
payloads/libpayload/drivers/usb/ehci_private.h
View File

@ -37,134 +37,35 @@
#define FLADJ 0x61 #define FLADJ 0x61
#define FLADJ_framelength(x) (((x)-59488)/16) #define FLADJ_framelength(x) (((x)-59488)/16)
typedef volatile union { typedef volatile u32 portsc_t;
u32 val; #define P_CURR_CONN_STATUS (1 << 0)
volatile struct { #define P_CONN_STATUS_CHANGE (1 << 1)
unsigned long current_conn_status:1; #define P_PORT_ENABLE (1 << 2)
unsigned long conn_status_change:1; #define P_PORT_RESET (1 << 8)
unsigned long port_enable:1; #define P_LINE_STATUS (3 << 10)
unsigned long port_enable_change:1; #define P_LINE_STATUS_LOWSPEED (1 << 10)
unsigned long overcurrent:1; #define P_PP (1 << 12)
unsigned long overcurrent_change:1; #define P_PORT_OWNER (1 << 13)
unsigned long force_port_resume:1;
unsigned long suspend:1;
unsigned long port_reset:1;
unsigned long:1;
unsigned long line_status:2;
unsigned long pp:1;
unsigned long port_owner:1;
unsigned long port_indicator_control:2;
unsigned long port_test_control:4;
unsigned long wake_on_connect_en:1;
unsigned long wake_on_disconnect_en:1;
unsigned long wake_on_overcurrent_en:1;
unsigned long:9;
} __attribute__ ((packed));
} __attribute__ ((packed)) portsc_t;
typedef volatile struct { typedef volatile struct {
#define HCS_NPORTS_MASK 0xf
u8 caplength; u8 caplength;
u8 res1; u8 res1;
u16 hciversion; u16 hciversion;
union {
u32 hcsparams; u32 hcsparams;
struct {
unsigned long n_ports:4;
unsigned long ppc:1;
unsigned long:2;
unsigned long port_routing_rules:1;
unsigned long n_pcc:4;
unsigned long n_cc:4;
unsigned long p_indicator:1;
unsigned long:3;
unsigned long debug_port_number:4;
unsigned long:8;
} __attribute__ ((packed));
};
union {
u32 hccparams; u32 hccparams;
struct {
unsigned long cap_64b_addr:1;
unsigned long cap_prog_framelist_size:1;
unsigned long cap_async_park:1;
unsigned long:1;
unsigned long isoc_sched_threshold:4;
unsigned long eecp:8;
unsigned long:16;
} __attribute__ ((packed));
};
union {
u64 hcsp_portroute; u64 hcsp_portroute;
struct {
unsigned long portroute0:4;
unsigned long portroute1:4;
unsigned long portroute2:4;
unsigned long portroute3:4;
unsigned long portroute4:4;
unsigned long portroute5:4;
unsigned long portroute6:4;
unsigned long portroute7:4;
unsigned long portroute8:4;
unsigned long portroute9:4;
unsigned long portroute10:4;
unsigned long portroute11:4;
unsigned long portroute12:4;
unsigned long portroute13:4;
unsigned long portroute14:4;
unsigned long portroute15:4;
unsigned long:4;
} __attribute__ ((packed));
};
} __attribute__ ((packed)) hc_cap_t; } __attribute__ ((packed)) hc_cap_t;
typedef volatile struct { typedef volatile struct {
union {
u32 usbcmd; u32 usbcmd;
volatile struct { #define HC_OP_RS 1
unsigned long rs:1; #define HC_OP_ASYNC_SCHED_EN_SHIFT 5
unsigned long hcreset:1; #define HC_OP_ASYNC_SCHED_EN (1 << HC_OP_ASYNC_SCHED_EN_SHIFT)
unsigned long frame_list_size:2;
unsigned long periodic_sched_enable:1;
unsigned long async_sched_enable:1;
unsigned long irq_on_async_advance_doorbell:1;
unsigned long light_hc_reset:1;
unsigned long async_sched_park_mode_count:2;
unsigned long:1;
unsigned long async_sched_park_mode_enable:1;
unsigned long:4;
unsigned long irq_threshold_count:8;
unsigned long:8;
} __attribute__ ((packed));
};
union {
u32 usbsts; u32 usbsts;
struct { #define HC_OP_ASYNC_SCHED_STAT_SHIFT 15
unsigned long usbint:1; #define HC_OP_ASYNC_SCHED_STAT (1 << HC_OP_ASYNC_SCHED_STAT_SHIFT)
unsigned long usberrint:1;
unsigned long port_change_detect:1;
unsigned long frame_list_rollover:1;
unsigned long host_system_error:1;
unsigned long irq_on_async_advance:1;
unsigned long:6;
unsigned long hchalted:1;
unsigned long reclamation:1;
unsigned long periodic_sched_status:1;
unsigned long async_sched_status:1;
unsigned long:16;
} __attribute__ ((packed));
};
union {
u32 usbintr; u32 usbintr;
struct {
unsigned long en_usb_irq:1;
unsigned long en_usb_err_irq:1;
unsigned long en_port_change_irq:1;
unsigned long en_frame_list_rollover_irq:1;
unsigned long en_host_system_error_irq:1;
unsigned long en_irq_on_async_advance:1;
unsigned long:26;
} __attribute__ ((packed));
};
u32 frindex; u32 frindex;
u32 ctrldssegment; u32 ctrldssegment;
u32 periodiclistbase; u32 periodiclistbase;
@ -175,82 +76,46 @@ typedef volatile struct {
} hc_op_t; } hc_op_t;
typedef volatile struct { typedef volatile struct {
union { #define QTD_TERMINATE 1
u32 next_qtd; u32 next_qtd;
struct {
unsigned long terminate:1;
unsigned long:4;
unsigned long:27;
} __attribute__ ((packed));
};
union {
u32 alt_next_qtd; u32 alt_next_qtd;
struct { u32 token;
unsigned long alt_terminate:1; #define QTD_STATUS_MASK 0xff
unsigned long:4; #define QTD_HALTED (1 << 14)
unsigned long:27; #define QTD_ACTIVE (1 << 15)
} __attribute__ ((packed)); #define QTD_PID_SHIFT 8
}; #define QTD_PID_MASK (3 << QTD_PID_SHIFT)
struct { #define QTD_CERR_SHIFT 10
union { #define QTD_CERR_MASK (3 << QTD_CERR_SHIFT)
volatile u8 status; #define QTD_CPAGE_SHIFT 12
struct { #define QTD_CPAGE_MASK (7 << QTD_CPAGE_SHIFT)
volatile unsigned long perr:1; #define QTD_TOTAL_LEN_SHIFT 16
volatile unsigned long splitxstate:1; #define QTD_TOTAL_LEN_MASK (((1<<15)-1) << QTD_TOTAL_LEN_SHIFT)
volatile unsigned long missed_mframe:1; #define QTD_TOGGLE_SHIFT 31
volatile unsigned long xact_err:1; #define QTD_TOGGLE_MASK (1 << 31)
volatile unsigned long babble:1; #define QTD_TOGGLE_DATA0 0
volatile unsigned long data_buf_err:1; #define QTD_TOGGLE_DATA1 (1 << QTD_TOGGLE_SHIFT)
volatile unsigned long halted:1; u32 bufptrs[5];
volatile unsigned long active:1;
} __attribute__ ((packed));
};
unsigned long pid:2;
volatile unsigned long cerr:2;
volatile unsigned long c_page:3;
unsigned long ioc:1;
volatile unsigned long total_len:15;
volatile unsigned long dt:1;
} __attribute__ ((packed));
union {
u32 bufptr0;
struct {
volatile unsigned long cur_off:12;
unsigned long:20;
} __attribute__ ((packed));
};
u32 bufptrs[4];
u32 bufptrs64[5]; u32 bufptrs64[5];
} __attribute__ ((packed)) qtd_t; } __attribute__ ((packed)) qtd_t;
typedef volatile struct { typedef volatile struct {
union {
u32 horiz_link_ptr; u32 horiz_link_ptr;
struct { #define QH_TERMINATE 1
unsigned long terminate:1; #define QH_iTD (0<<1)
unsigned long type:2; #define QH_QH (1<<1)
unsigned long:1; #define QH_siTD (2<<1)
unsigned long:28; #define QH_FSTN (3<<1)
} __attribute__ ((packed)); u32 epchar;
}; #define QH_EP_SHIFT 8
struct { #define QH_EPS_SHIFT 12
unsigned long addr:7; #define QH_DTC_SHIFT 14
unsigned long inactivate:1; #define QH_RECLAIM_HEAD_SHIFT 15
unsigned long ep:4; #define QH_MPS_SHIFT 16
unsigned long eps:2; #define QH_NON_HS_CTRL_EP_SHIFT 27
unsigned long dtc:1; #define QH_NAK_CNT_SHIFT 28
unsigned long reclaim_head:1; u32 epcaps;
unsigned long max_packet_len:11; #define QH_PIPE_MULTIPLIER_SHIFT 30
unsigned long non_hs_control_ep:1;
unsigned long nak_cnt_reload:4;
} __attribute__ ((packed));
struct {
unsigned long irq_sched_mask:8;
unsigned long split_compl_mask:8;
unsigned long hub_addr:7;
unsigned long port_num:7;
unsigned long pipe_multiplier:2;
} __attribute__ ((packed));
volatile u32 current_td_ptr; volatile u32 current_td_ptr;
volatile qtd_t td; volatile qtd_t td;
} ehci_qh_t; } ehci_qh_t;

41
payloads/libpayload/drivers/usb/ehci_rh.c
View File

@ -54,19 +54,14 @@ static void
ehci_rh_hand_over_port (usbdev_t *dev, int port) ehci_rh_hand_over_port (usbdev_t *dev, int port)
{ {
volatile portsc_t *p = &(RH_INST(dev)->ports[port]); volatile portsc_t *p = &(RH_INST(dev)->ports[port]);
volatile portsc_t tmp;
debug("giving up port %x, it's USB1\n", port+1); debug("giving up port %x, it's USB1\n", port+1);
/* Lowspeed device. Hand over to companion */ /* Lowspeed device. Hand over to companion */
tmp = *p; *p |= P_PORT_OWNER;
tmp.port_owner = 1; do {} while (!(*p & P_CONN_STATUS_CHANGE));
*p = tmp;
do {} while (!p->conn_status_change);
/* RW/C register, so clear it by writing 1 */ /* RW/C register, so clear it by writing 1 */
tmp = *p; *p |= P_CONN_STATUS_CHANGE;
tmp.conn_status_change = 1;
*p = tmp;
return; return;
} }
@ -74,16 +69,15 @@ static void
ehci_rh_scanport (usbdev_t *dev, int port) ehci_rh_scanport (usbdev_t *dev, int port)
{ {
volatile portsc_t *p = &(RH_INST(dev)->ports[port]); volatile portsc_t *p = &(RH_INST(dev)->ports[port]);
volatile portsc_t tmp;
if (RH_INST(dev)->devices[port]!=-1) { if (RH_INST(dev)->devices[port]!=-1) {
debug("Unregister device at port %x\n", port+1); debug("Unregister device at port %x\n", port+1);
usb_detach_device(dev->controller, RH_INST(dev)->devices[port]); usb_detach_device(dev->controller, RH_INST(dev)->devices[port]);
RH_INST(dev)->devices[port]=-1; RH_INST(dev)->devices[port]=-1;
} }
/* device connected, handle */ /* device connected, handle */
if (p->current_conn_status) { if (*p & P_CURR_CONN_STATUS) {
mdelay(100); mdelay(100);
if (p->line_status == 0x1) { if ((*p & P_LINE_STATUS) == P_LINE_STATUS_LOWSPEED) {
ehci_rh_hand_over_port(dev, port); ehci_rh_hand_over_port(dev, port);
return; return;
} }
@ -91,21 +85,17 @@ ehci_rh_scanport (usbdev_t *dev, int port)
/* Deassert enable, assert reset. These must change /* Deassert enable, assert reset. These must change
* atomically. * atomically.
*/ */
tmp = *p; *p = (*p & ~P_PORT_ENABLE) | P_PORT_RESET;
tmp.port_enable = 0;
tmp.port_reset = 1;
*p = tmp;
/* Wait a bit while reset is active. */ /* Wait a bit while reset is active. */
mdelay(50); mdelay(50);
/* Deassert reset. */ /* Deassert reset. */
tmp.port_reset = 0; *p &= ~P_PORT_RESET;
*p = tmp;
/* Wait for flag change to finish. The controller might take a while */ /* Wait for flag change to finish. The controller might take a while */
while (p->port_reset) ; while (*p & P_PORT_RESET) ;
if (!p->port_enable) { if (!(*p & P_PORT_ENABLE)) {
ehci_rh_hand_over_port(dev, port); ehci_rh_hand_over_port(dev, port);
return; return;
} }
@ -113,9 +103,7 @@ ehci_rh_scanport (usbdev_t *dev, int port)
RH_INST(dev)->devices[port] = usb_attach_device(dev->controller, dev->address, port, 2); RH_INST(dev)->devices[port] = usb_attach_device(dev->controller, dev->address, port, 2);
} }
/* RW/C register, so clear it by writing 1 */ /* RW/C register, so clear it by writing 1 */
tmp = *p; *p |= P_CONN_STATUS_CHANGE;
tmp.conn_status_change = 1;
*p = tmp;
} }
static int static int
@ -123,7 +111,7 @@ ehci_rh_report_port_changes (usbdev_t *dev)
{ {
int i; int i;
for (i=0; i<RH_INST(dev)->n_ports; i++) { for (i=0; i<RH_INST(dev)->n_ports; i++) {
if (RH_INST(dev)->ports[i].conn_status_change) if (RH_INST(dev)->ports[i] & P_CONN_STATUS_CHANGE)
return i; return i;
} }
return -1; return -1;
@ -143,14 +131,13 @@ ehci_rh_init (usbdev_t *dev)
{ {
int i; int i;
volatile portsc_t *p; volatile portsc_t *p;
volatile portsc_t tmp;
dev->destroy = ehci_rh_destroy; dev->destroy = ehci_rh_destroy;
dev->poll = ehci_rh_poll; dev->poll = ehci_rh_poll;
dev->data = malloc(sizeof(rh_inst_t)); dev->data = malloc(sizeof(rh_inst_t));
RH_INST(dev)->n_ports = EHCI_INST(dev->controller)->capabilities->n_ports; RH_INST(dev)->n_ports = EHCI_INST(dev->controller)->capabilities->hcsparams & HCS_NPORTS_MASK;
RH_INST(dev)->ports = EHCI_INST(dev->controller)->operation->portsc; RH_INST(dev)->ports = EHCI_INST(dev->controller)->operation->portsc;
debug("root hub has %x ports\n", RH_INST(dev)->n_ports); debug("root hub has %x ports\n", RH_INST(dev)->n_ports);
@ -159,9 +146,7 @@ ehci_rh_init (usbdev_t *dev)
for (i=0; i < RH_INST(dev)->n_ports; i++) { for (i=0; i < RH_INST(dev)->n_ports; i++) {
p = &(RH_INST(dev)->ports[i]); p = &(RH_INST(dev)->ports[i]);
RH_INST(dev)->devices[i] = -1; RH_INST(dev)->devices[i] = -1;
tmp = *p; *p |= P_PP;
tmp.pp = 1;
*p = tmp;
} }
dev->address = 0; dev->address = 0;