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device/pci_ops: Move common pci_mmio_cfg.h

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It is expected that method of accessing PCI configuration
register space via memory-mapped region is arch-agnostic.

Change-Id: Ide6baa00d611953aeb324be0d3561f464395c5eb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31305
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2019-01-23 15:59:38 +02:00
parent 06e33226b3
commit 8fd78a653f
2 changed files with 3 additions and 1 deletions
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2
src/arch/x86/include/arch/io.h
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@@ -208,7 +208,7 @@ static __always_inline void write64(volatile void *addr,
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC)) #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
#include <arch/pci_io_cfg.h> #include <arch/pci_io_cfg.h>
#include <arch/pci_mmio_cfg.h> #include <device/pci_mmio_cfg.h>
static __always_inline static __always_inline
uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where) uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)

2
src/arch/x86/include/arch/pci_mmio_cfg.h → src/include/device/pci_mmio_cfg.h
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@@ -16,7 +16,9 @@
#ifndef _PCI_MMIO_CFG_H #ifndef _PCI_MMIO_CFG_H
#define _PCI_MMIO_CFG_H #define _PCI_MMIO_CFG_H
#include <stdint.h>
#include <arch/io.h> #include <arch/io.h>
#include <device/pci_type.h>
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS #define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS