soc/amd/picasso: Move BERT region to cbmem

Allocate storage for the BERT reserved memory in cbmem, and add it in
response to a romstage hook.  Add a Kconfig option for adjusting the
size reserved.  This is different from the Stoney Ridge implementation
where it was intentionally oversized to ease MTRR use and to keep TSEG
aligned.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4759154d394a8f5b35c0ef0a15994bbef25492e5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38694
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/picasso/mca.c

@@ -8,6 +8,7 @@
 #include <console/console.h>
 #include <arch/bert_storage.h>
 #include <cper.h>
+#include <cbmem.h>
 
 struct mca_bank {
 	int bank;
@@ -193,3 +194,31 @@ void check_mca(void)
 	for (i = 0 ; i < num_banks ; i++)
 		wrmsr(IA32_MC0_STATUS + (i * 4), mci.sts);
 }
+
+void bert_reserved_region(void **start, size_t *size)
+{
+	const struct cbmem_entry *bert;
+
+	*start = NULL;
+	*size = 0;
+
+	bert = cbmem_entry_find(CBMEM_ID_BERT_RAW_DATA);
+	if (!bert)
+		return;
+
+	*start = cbmem_entry_start(bert);
+	*size = cbmem_entry_size(bert);
+}
+
+static void alloc_bert_in_cbmem(int unused)
+{
+	void *p;
+
+	if (CONFIG(ACPI_BERT)) {
+		p = cbmem_add(CBMEM_ID_BERT_RAW_DATA, CONFIG_ACPI_BERT_SIZE);
+		if (!p)
+			printk(BIOS_ERR, "Error: BERT region was not added\n");
+	}
+}
+
+ROMSTAGE_CBMEM_INIT_HOOK(alloc_bert_in_cbmem)