libpayload: Fill gaps in the xHCI driver
Well, it turned out to be more as some gaps ;) but we finally have xHCI running. It's well tested against a QM77 Ivy Bridge board. We have no SuperSpeed support (yet). On Ivy Bridge, SuperSpeed is not advertised and USB 3 devices will just work at HighSpeed. There are still some bit fields in xhci_private.h, so this might need little more work to run on ARM. Change-Id: I7a2cb3f226d24573659142565db38b13acdc218c Signed-off-by: Nico Huber <nico.huber@secunet.com> Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/3452 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Nico Huber
committed by
Stefan Reinauer
Stefan Reinauer
parent
5736fab4be
commit
9029265cf5
333
payloads/libpayload/drivers/usb/xhci_events.c
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333
payloads/libpayload/drivers/usb/xhci_events.c
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/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2013 secunet Security Networks AG
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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//#define XHCI_SPEW_DEBUG
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#include <inttypes.h>
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#include <arch/virtual.h>
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#include "xhci_private.h"
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void
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xhci_reset_event_ring(event_ring_t *const er)
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{
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int i;
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for (i = 0; i < EVENT_RING_SIZE; ++i)
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er->ring[i].control &= ~TRB_CYCLE;
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er->cur = er->ring;
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er->last = er->ring + EVENT_RING_SIZE;
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er->ccs = 1;
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er->adv = 1;
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}
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static inline int
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xhci_event_ready(const event_ring_t *const er)
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{
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return (er->cur->control & TRB_CYCLE) == er->ccs;
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}
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void
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xhci_update_event_dq(xhci_t *const xhci)
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{
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if (xhci->er.adv) {
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xhci_spew("Updating dq ptr: @%p(0x%08"PRIx32") -> %p\n",
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phys_to_virt(xhci->hcrreg->intrrs[0].erdp_lo),
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xhci->hcrreg->intrrs[0].erdp_lo, xhci->er.cur);
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xhci->hcrreg->intrrs[0].erdp_lo = virt_to_phys(xhci->er.cur);
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xhci->hcrreg->intrrs[0].erdp_hi = 0;
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xhci->er.adv = 0;
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}
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}
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void
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xhci_advance_event_ring(xhci_t *const xhci)
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{
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xhci->er.cur++;
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xhci->er.adv = 1;
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if (xhci->er.cur == xhci->er.last) {
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xhci_spew("Roll over in event ring\n");
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xhci->er.cur = xhci->er.ring;
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xhci->er.ccs ^= 1;
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xhci_update_event_dq(xhci);
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}
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}
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static void
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xhci_handle_transfer_event(xhci_t *const xhci)
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{
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const trb_t *const ev = xhci->er.cur;
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const int cc = TRB_GET(CC, ev);
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const int id = TRB_GET(ID, ev);
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const int ep = TRB_GET(EP, ev);
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devinfo_t *di;
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intrq_t *intrq;
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if (id && id <= xhci->max_slots_en &&
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(di = DEVINFO_FROM_XHCI(xhci, id)) &&
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(intrq = di->interrupt_queues[ep])) {
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/* It's a running interrupt endpoint */
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intrq->ready = phys_to_virt(ev->ptr_low);
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if (cc == CC_SUCCESS || cc == CC_SHORT_PACKET) {
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TRB_SET(TL, intrq->ready,
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intrq->size - TRB_GET(EVTL, ev));
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} else {
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xhci_debug("Interrupt Transfer failed: %d\n",
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cc);
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TRB_SET(TL, intrq->ready, 0);
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}
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} else if (cc == CC_STOPPED || cc == CC_STOPPED_LENGTH_INVALID) {
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/* Ignore 'Forced Stop Events' */
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} else {
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xhci_debug("Warning: "
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"Spurious transfer event for ID %d, EP %d:\n"
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" Pointer: 0x%08x%08x\n"
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" TL: 0x%06x\n"
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" CC: %d\n",
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id, ep,
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ev->ptr_high, ev->ptr_low,
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TRB_GET(EVTL, ev), cc);
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}
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xhci_advance_event_ring(xhci);
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}
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static void
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xhci_handle_command_completion_event(xhci_t *const xhci)
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{
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const trb_t *const ev = xhci->er.cur;
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xhci_debug("Warning: Spurious command completion event:\n"
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" Pointer: 0x%08x%08x\n"
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" CC: %d\n"
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" Slot ID: %d\n"
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" Cycle: %d\n",
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ev->ptr_high, ev->ptr_low,
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TRB_GET(CC, ev), TRB_GET(ID, ev), ev->control & TRB_CYCLE);
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xhci_advance_event_ring(xhci);
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}
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static void
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xhci_handle_host_controller_event(xhci_t *const xhci)
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{
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const trb_t *const ev = xhci->er.cur;
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const int cc = TRB_GET(CC, ev);
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switch (cc) {
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case CC_EVENT_RING_FULL_ERROR:
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xhci_debug("Event ring full! (@%p)\n", xhci->er.cur);
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/*
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* If we get here, we have processed the whole queue:
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* xHC pushes this event, when it sees the ring full,
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* full of other events.
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* IMO it's save and necessary to update the dequeue
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* pointer here.
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*/
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xhci_advance_event_ring(xhci);
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xhci_update_event_dq(xhci);
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break;
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default:
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xhci_debug("Warning: Spurious host controller event: %d\n", cc);
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xhci_advance_event_ring(xhci);
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break;
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}
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}
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/* handle standard types:
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* - command completion event
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* - port status change event
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* - transfer event
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* - host controller event
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*/
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static void
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xhci_handle_event(xhci_t *const xhci)
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{
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const trb_t *const ev = xhci->er.cur;
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const int trb_type = TRB_GET(TT, ev);
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switch (trb_type) {
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/* Either pass along the event or advance event ring */
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case TRB_EV_TRANSFER:
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xhci_handle_transfer_event(xhci);
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break;
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case TRB_EV_CMD_CMPL:
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xhci_handle_command_completion_event(xhci);
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break;
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case TRB_EV_PORTSC:
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xhci_debug("Port Status Change Event for %d: %d\n",
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TRB_GET(PORT, ev), TRB_GET(CC, ev));
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/* We ignore the event as we look for the PORTSC
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registers instead, at a time when it suits _us_. */
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xhci_advance_event_ring(xhci);
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break;
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case TRB_EV_HOST:
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xhci_handle_host_controller_event(xhci);
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break;
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default:
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xhci_debug("Warning: Spurious event: %d, Completion Code: %d\n",
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trb_type, TRB_GET(CC, ev));
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xhci_advance_event_ring(xhci);
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break;
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}
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}
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void
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xhci_handle_events(xhci_t *const xhci)
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{
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while (xhci_event_ready(&xhci->er))
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xhci_handle_event(xhci);
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xhci_update_event_dq(xhci);
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}
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static unsigned long
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xhci_wait_for_event(const event_ring_t *const er,
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unsigned long *const timeout_us)
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{
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while (!xhci_event_ready(er) && *timeout_us) {
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--*timeout_us;
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udelay(1);
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}
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return *timeout_us;
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}
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static unsigned long
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xhci_wait_for_event_type(xhci_t *const xhci,
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const int trb_type,
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unsigned long *const timeout_us)
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{
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while (xhci_wait_for_event(&xhci->er, timeout_us)) {
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if (TRB_GET(TT, xhci->er.cur) == trb_type)
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break;
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xhci_handle_event(xhci);
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}
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return *timeout_us;
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}
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/* returns cc of command in question (pointed to by `address`) */
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int
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xhci_wait_for_command_aborted(xhci_t *const xhci, const trb_t *const address)
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{
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/*
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* Specification says that something might be seriously wrong, if
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* we don't get a response after 5s. Still, let the caller decide,
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* what to do then.
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*/
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unsigned long timeout_us = 5 * 1000 * 1000; /* 5s */
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int cc = TIMEOUT;
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/*
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* Expects two command completion events:
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* The first with CC == COMMAND_ABORTED should point to address,
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* the second with CC == COMMAND_RING_STOPPED should point to new dq.
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*/
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while (xhci_wait_for_event_type(xhci, TRB_EV_CMD_CMPL, &timeout_us)) {
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if ((xhci->er.cur->ptr_low == virt_to_phys(address)) &&
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(xhci->er.cur->ptr_high == 0)) {
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cc = TRB_GET(CC, xhci->er.cur);
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xhci_advance_event_ring(xhci);
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break;
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}
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xhci_handle_command_completion_event(xhci);
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}
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if (!timeout_us)
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xhci_debug("Warning: Timed out waiting for COMMAND_ABORTED.\n");
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while (xhci_wait_for_event_type(xhci, TRB_EV_CMD_CMPL, &timeout_us)) {
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if (TRB_GET(CC, xhci->er.cur) == CC_COMMAND_RING_STOPPED) {
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xhci->cr.cur = phys_to_virt(xhci->er.cur->ptr_low);
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xhci_advance_event_ring(xhci);
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break;
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}
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xhci_handle_command_completion_event(xhci);
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}
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if (!timeout_us)
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xhci_debug("Warning: Timed out "
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"waiting for COMMAND_RING_STOPPED.\n");
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xhci_update_event_dq(xhci);
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return cc;
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}
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/*
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* returns cc of command in question (pointed to by `address`)
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* caller should abort command if cc is TIMEOUT
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*/
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int
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xhci_wait_for_command_done(xhci_t *const xhci,
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const trb_t *const address,
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const int clear_event)
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{
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/*
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* The Address Device Command should take most time, as it has to
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* communicate with the USB device. Set address processing shouldn't
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* take longer than 50ms (at the slave). Let's take a timeout of
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* 100ms.
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*/
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unsigned long timeout_us = 100 * 1000; /* 100ms */
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int cc = TIMEOUT;
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while (xhci_wait_for_event_type(xhci, TRB_EV_CMD_CMPL, &timeout_us)) {
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if ((xhci->er.cur->ptr_low == virt_to_phys(address)) &&
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(xhci->er.cur->ptr_high == 0)) {
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cc = TRB_GET(CC, xhci->er.cur);
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break;
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}
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xhci_handle_command_completion_event(xhci);
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}
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if (!timeout_us) {
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xhci_debug("Warning: Timed out waiting for TRB_EV_CMD_CMPL.\n");
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} else if (clear_event) {
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xhci_advance_event_ring(xhci);
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}
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xhci_update_event_dq(xhci);
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return cc;
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}
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/* returns cc of transfer for given slot/endpoint pair */
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int
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xhci_wait_for_transfer(xhci_t *const xhci, const int slot_id, const int ep_id)
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{
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xhci_spew("Waiting for transfer on ID %d EP %d\n", slot_id, ep_id);
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/* 2s for all types of transfers */ /* TODO: test, wait longer? */
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unsigned long timeout_us = 2 * 1000 * 1000;
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int cc = TIMEOUT;
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while (xhci_wait_for_event_type(xhci, TRB_EV_TRANSFER, &timeout_us)) {
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if (TRB_GET(ID, xhci->er.cur) == slot_id &&
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TRB_GET(EP, xhci->er.cur) == ep_id) {
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cc = TRB_GET(CC, xhci->er.cur);
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xhci_advance_event_ring(xhci);
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break;
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}
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xhci_handle_transfer_event(xhci);
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}
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if (!timeout_us)
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xhci_debug("Warning: Timed out waiting for TRB_EV_TRANSFER.\n");
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xhci_update_event_dq(xhci);
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return cc;
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}
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