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drivers/intel/fsp2_0: Support FSP-T in long mode

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Call into FSP-T using the protected mode wrapper
and enter long mode in FSP-T support assembly code.

TEST: Booted on ibm/sbp1 in long mode.

Change-Id: Id6b9780b06b4bfbb952e32091ffbf3d0014f2090
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81281
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Arthur Heymans 2020-12-09 13:29:26 +01:00 committed by Lean Sheng Tan
parent e79d97bc3b
commit 9099a6bb4d
2 changed files with 20 additions and 4 deletions
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8
src/drivers/intel/fsp2_0/temp_ram_exit.c
View File

@ -1,10 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <arch/romstage.h>
#include <cbfs.h>
#include <console/console.h>
#include <fsp/api.h>
#include <fsp/util.h>
#include <cbfs.h>
#include <mode_switch.h>
#include <types.h>
static void fsp_temp_ram_exit(void)
@ -25,8 +26,11 @@ static void fsp_temp_ram_exit(void)
if (fsp_validate_component(&hdr, mapping, size) != CB_SUCCESS)
die("Invalid FSPM header!\n");
temp_ram_exit = (void *)(hdr.image_base + hdr.temp_ram_exit_entry_offset);
temp_ram_exit = (void *)(uintptr_t)(hdr.image_base + hdr.temp_ram_exit_entry_offset);
printk(BIOS_DEBUG, "Calling TempRamExit: %p\n", temp_ram_exit);
if (ENV_X86_64 && CONFIG(PLATFORM_USES_FSP2_X86_32))
status = protected_mode_call_1arg(temp_ram_exit, (uintptr_t)NULL);
else
status = temp_ram_exit(NULL);
if (status != FSP_SUCCESS)

14
src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
View File

@ -1,8 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/pci_def.h>
#include <cpu/x86/64bit/entry64.inc>
#include <cpu/x86/cr.h>
#include <cpu/x86/post_code.h>
#include <device/pci_def.h>
#include <intelblocks/post_codes.h>
#define CBFS_FILE_MAGIC 0
@ -15,6 +16,8 @@
.extern temp_ram_init_params
.code32
.global bootblock_pre_c_entry
bootblock_pre_c_entry:
@ -88,10 +91,19 @@ CAR_init_done:
pop %ecx
movl %ecx, temp_memory_start
#if ENV_X86_64
setup_longmode $PM4LE
movl %ebp, %edi
shlq $32, %rdi
movd %mm1, %rsi
or %rsi, %rdi
andl $0xfffffff0, %esp
#else
/* Restore the timestamp from bootblock_crt0.S (ebp:mm1) */
push %ebp
movd %mm1, %eax
push %eax
#endif
/* Copy .data section content to Cache-As-Ram */
#include <cpu/x86/copy_data_section.inc>