sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

vt8237: add support for setting the power state after loss of power

Browse Source 
Change-Id: Ia7e3e77235530e952b2e84fdec8373b90fa59b7a
Signed-off-by: Florian Zumbiehl <florz@florz.de>
Reviewed-on: http://review.coreboot.org/437
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
This commit is contained in:
Florian Zumbiehl
2011-11-01 20:19:04 +01:00
committed by Rudolf Marek
parent fa48b96908
commit 912d8919d4
1 changed files with 12 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
src/southbridge/via/vt8237r/lpc.c
View File

@@ -421,6 +421,9 @@ static void vt8237s_init(struct device *dev)
static void vt8237_common_init(struct device *dev)
{
u8 enables, byte;
#if !CONFIG_EPIA_VT8237R_INIT
unsigned char pwr_on;
#endif
/* Enable addr/data stepping. */
byte = pci_read_config8(dev, PCI_COMMAND);
@@ -508,6 +511,15 @@ static void vt8237_common_init(struct device *dev)
*/
pci_write_config8(dev, 0x5b, 0xb);
/* configure power state of the board after loss of power */
if (get_option(&pwr_on, "power_on_after_fail") < 0)
pwr_on = 1;
enables = pci_read_config8(dev, 0x58);
pci_write_config8(dev, 0x58, enables & ~0x02);
outb(0x0d, 0x70);
outb(pwr_on ? 0x00 : 0x80, 0x71);
pci_write_config8(dev, 0x58, enables);
/* Set 0x58 to 0x43 APIC and RTC. */
pci_write_config8(dev, 0x58, 0x43);